SI2110-D-FMR Silicon Laboratories Inc, SI2110-D-FMR Datasheet - Page 35
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SI2110-D-FMR
Manufacturer Part Number
SI2110-D-FMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI2110-D-FMR.pdf
(98 pages)
Specifications of SI2110-D-FMR
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Supplier Unconfirmed
The LNB supply controller is disabled by default. To use
the supply, it must be enabled by setting the LNB enable
bit, LNB_EN. If the LNB supply circuit is connected, the
TFS bit is ignored; the internal LNB supply controller
uses its internal oscillator to generate the 22 kHz tone.
The TFQ setting can still be used to modify the nominal
frequency as explained earlier.
Selection
corresponding PWM control signal for the boost
converter. To compensate for long cable lengths, a 1 V
boost can be applied to both levels by setting the COMP
bit.
The nominal level of both the low- and high-output
voltages can be further fine-tuned using the VLOW and
VHIGH registers. Register bit LNBV selects whether to
output high or low dc voltage to the LNB. During
operation, the voltage level of the line can be monitored
via the VMON register.
The maximum current draw of the LNB supply can be
set using the IMAX register. The overcurrent threshold
of the LNB supply may be set via the ILIM register. If the
output current exceeds this value, the external LNB
power supply is automatically disabled, and the
overcurrent detect bit, OCD, is asserted. The device
attempts to restore normal operation after 1 s by
supplying power to the line. During the recovery period,
overcurrent detection is disabled for the time specified
by the OLOT register.
Short circuit protection circuitry operates in conjunction
with overcurrent detection to rapidly identify short-circuit
conditions. If the output is shorted to ground, the
external LNB power supply is automatically disabled,
and the short-circuit detect bit, SCD, is asserted. The
device attempts to restore normal operation after one
second by supplying power to the line. During the
recovery period, short-circuit detection is disabled for
the time specified by the SLOT register.
The LNB supply circuit is protected from an overvoltage
condition by design. In the event that the LNB supply
circuit is accidentally connected to a voltage source
greater than the intended output voltage, it remains
operational. The LNB supply circuit resumes normal
operation when the connection to the external voltage
source has been removed.
of
high
or
low
voltage
outputs
the
Rev. 1.0
6.9. On-Chip Blindscan Controller:
QuickScan is comprised of a two stage process: a
blindscan stage and confirmation stage. It is an
automated
maximum RF frequency and symbol rate limits are
entered in the following registers BS_FMIN, BS_FMAX,
SRMIN, and SRMAX. After blindscan is completed, the
host may further use the resulting candidate channel
information (channel center frequencies and baud
rates) to try to actually acquire such channels by locking
the receiver to them. Further information such as C/N,
BER, channel program IDs, and etc. can be obtained
once the receiver locks to a candidate channel. Through
this
channels can be rejected.
6.9.1. Programming Sequence
If QuickScan is conducted whereby the symbol rate
search range is above 12.5 MBaud (for example
SRMIN = 2 MBaud and SRMAX = 20 MBaud) Silicon
Laboratories recommends that blindscan is performed
twice to ensure the most favorable estimates of channel
frequencies and symbol rates.
The programming sequence is as follows:
1. Program the frequency range (BS_FMIN, BS_FMAX) and
The default values for the minimum and maximum
symbol rates are zero. Enter minimum and maximum
symbol rates.
Recommended values are SRMIN = 1 MBaud and
SRMAX = 45 MBaud for discovery of all possible DVB-
S channels.
2. Program the following registers with the following
a. Default values
a. LSA Control Register 1. The length of the time
b. Tilt Correction Threshold Register. A correction can be
c.
d. 1 dB Bandwidth Threshold Register. This sets the
symbol rate range (SRMIN, SRMAX) values over which to
perform blindscan.
parameters.
QuickScan (Si2109/10 Only)
confirmation
Reference Noise Level Margin Threshold Register.
averaging window is set by setting AVG_WIN. The
averaging removes uncorrelated noise from the
spectrum.
applied to the spectrum to compensate for "tilts" in the
spectrum due to frequency dependent attenuation
such as poor cables for example.
This sets the power level threshold for the detection of
channels.
i. SRMIN = 0 MBaud
ii. SRMAX = 0 MBaud
iii. BS_FMIN = 825 MHz
iv. BS_MAX= 2087 MHz
process
Si2107/08/09/10
process,
whereby
any
the
falsely
minimum
identified
and
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