CS5102A-JL Cirrus Logic Inc, CS5102A-JL Datasheet - Page 34

• Manufacturer Part Number: CS5102A-JL
• Description: ADC Single SAR 20KSPS 16-Bit Serial 28-Pin PLCC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5102A-JL

• Package: 28PLCC
• Resolution: 16 Bit
• Sampling Rate: 20 KSPS
• Architecture: SAR
• Number Of Adcs: 1
• Number Of Analog Inputs: 2
• Digital Interface Type: Serial
• Input Type: Voltage
• Signal To Noise Ratio: 90(Typ) dB
• Polarity Of Input Voltage: Unipolar|Bipolar

Digital Outputs
STBY - Standby (Calibrating), PIN 5.
SDATA - Serial Output, PIN 15.
SSH/SDL - Simultaneous Sample/Hold / Serial Data Latch, PIN 11.
TRK1, TRK2 - Tracking Channel 1, Tracking Channel 2, PINS 8 and 9.
Analog Outputs
REFBUF - Reference Buffer Output, PIN 21.
Miscellaneous
TEST - Test, PIN 26.
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Indicates calibration status after reset. Remains low throughout the calibration sequence and
returns high upon completion.
Presents each output data bit on a falling edge of SCLK. Data is valid to be latched on the
rising edge of SCLK.
Used to control an external sample/hold amplifier to achieve simultaneous sampling between
channels. In FRN and SSC modes (SCLK is an output), this signal provides a convenient latch
signal which forms the 16 data bits. This can be used to control external serial to parallel
latches, or to control the serial port in a DSP.
Falls low at the end of a conversion cycle, indicating the acquisition phase for the
corresponding channel. The TRK1 or TRK2 pin will return high at the beginning of conversion
for that channel.
Reference buffer output. A 0.1 F ceramic capacitor must be tied between this pin and VA-.
Allows access to the CS5101A’s and the CS5102A’s test functions which are reserved for
factory use. Must be tied to VD+.
CS5101A CS5102A
DS45F2