XCV600E-6BGG432C Xilinx Inc, XCV600E-6BGG432C Datasheet - Page 75

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XCV600E-6BGG432C

Manufacturer Part Number
XCV600E-6BGG432C
Description
FPGA Virtex-E Family 186.624K Gates 15552 Cells 357MHz 0.18um (CMOS) Technology 1.8V 432-Pin BGA
Manufacturer
Xilinx Inc
Datasheet

Specifications of XCV600E-6BGG432C

Package
432BGA
Family Name
Virtex-E
Device Logic Gates
186624
Device Logic Units
15552
Device System Gates
985882
Maximum Internal Frequency
357 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
316
Ram Bits
294912
Re-programmability Support
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XCV600E-6BGG432C
Manufacturer:
XILINX
0
CLB Arithmetic Switching Characteristics
Setup times not listed explicitly can be approximated by decreasing the combinatorial delays by the setup time adjustment
listed. Precise values are provided by the timing analyzer.
DS022-3 (v2.9.2) March 14, 2003
Production Product Specification
Notes:
1.
Combinatorial Delays
F operand inputs to X via XOR
F operand input to XB output
F operand input to Y via XOR
F operand input to YB output
F operand input to COUT output
G operand inputs to Y via XOR
G operand input to YB output
G operand input to COUT output
BX initialization input to COUT
CIN input to X output via XOR
CIN input to XB
CIN input to Y via XOR
CIN input to YB
CIN input to COUT output
Multiplier Operation
F1/2 operand inputs to XB output via AND
F1/2 operand inputs to YB output via AND
F1/2 operand inputs to COUT output via AND
G1/2 operand inputs to YB output via AND
G1/2 operand inputs to COUT output via AND
Setup and Hold Times before/after Clock CLK
CIN input to FFX
CIN input to FFY
A Zero “0” Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed “best-case”, but
if a “0” is listed, there is no positive hold time.
R
Description
T
T
CCKX
CCKY
T
T
T
T
Symbol
T
www.xilinx.com
T
T
T
1-800-255-7778
T
T
T
T
T
T
GANDCY
FANDCY
GANDYB
T
T
FANDXB
FANDYB
T
T
OPGYB
OPCYG
OPCYF
T
CINXB
CINYB
OPXB
OPYB
OPGY
BXCY
CINX
CINY
OPX
OPY
BYP
/T
/T
CKCX
CKCY
0.47 / 0
0.49 / 0
0.32
0.35
0.59
0.48
0.37
0.34
0.47
0.36
0.19
0.27
0.02
0.26
0.16
0.05
0.10
0.28
0.17
0.20
0.09
Min
Virtex™-E 1.8 V Field Programmable Gate Arrays
0.92 / 0
1.0 / 0
Speed Grade
0.68
0.65
1.07
0.89
0.71
0.72
0.78
0.60
0.36
0.50
0.04
0.45
0.28
0.10
0.30
0.56
0.38
0.46
0.28
-8
1.2 / 0
1.2 / 0
0.51
0.07
0.38
0.14
0.35
0.46
0.55
0.30
0.8
0.8
1.4
1.1
0.9
0.8
1.2
0.9
0.6
0.7
0.7
-7
(1)
1.3 / 0
1.3 / 0
0.57
0.08
0.43
0.15
0.39
0.51
0.34
0.8
0.9
1.5
1.3
1.0
0.9
1.3
1.0
0.7
0.7
0.8
0.7
-6
Module 3 of 4
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, min
ns, min
Units
15

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