MACH211-15VC Lattice, MACH211-15VC Datasheet - Page 21

• Manufacturer Part Number: MACH211-15VC
• Description: CPLD MACH 2 Family 2.5K Gates 64 Macro Cells 66.6MHz EECMOS Technology 5V 44-Pin TQFP
• Manufacturer: Lattice

Specifications of MACH211-15VC

• Package: 44TQFP
• Family Name: MACH 2
• Device System Gates: 2500
• Number Of Macro Cells: 64
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 32
• Number Of Logic Blocks/elements: 4
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 66.6 MHz
• Number Of Product Terms Per Macro: 16
• Operating Temperature: 0 to 70 °C

BLOCK DIAGRAM (MACH211, MACH211SP)
Macrocells
Macrocells
I/O
I/O
I/O Cells
I/O Cells
24
8
8
0
–I/O
–I/O
7
AND Logic Array
31
Logic Allocator
8
8
AND Logic
Block A
Block D
26
26
2
2
52 x 68
52 x 68
Array
and
and
OE
OE
Macrocells
8
8
Macrocells
8
8
Switch Matrix
MACH 1 & 2 Families
Macrocells
Macrocells
I/O
I/O
I/O Cells
I/O Cells
16
8
8
8
–I/O
–I/O
AND Logic Array
15
Logic Allocator
23
8
8
AND Logic
26
26
2
Amrray
52 x 68
52 x 68
2
Block B
Block C
and
and
OE
MACH211 only
OE
Macrocells
8
8
Macrocells
8
8
CLK
CLK
CLK
CLK
CLK
CLK
I
I
0
3
0
1
0
1
3
2
/I
/I
/I
/I
/I
/I
2 MACH211SP
4 MACH211
2 MACH211 only
0
1
4
1
2
5
MACH211
MACH211
MACH211SP
14051K-010
21