XC3S500E-4FG320C Xilinx Inc, XC3S500E-4FG320C Datasheet - Page 77

• Manufacturer Part Number: XC3S500E-4FG320C
• Description: FPGA Spartan-3E Family 500K Gates 10476 Cells 572MHz 90nm (CMOS) Technology 1.2V 320-Pin FBGA
• Manufacturer: Xilinx Inc

Specifications of XC3S500E-4FG320C

• Package: 320FBGA
• Family Name: Spartan-3E
• Device Logic Cells: 10476
• Device Logic Units: 1164
• Device System Gates: 500000
• Number Of Registers: 9312
• Maximum Internal Frequency: 572 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 232
• Ram Bits: 368640

DS312-2 (v3.8) August 26, 2009
Product Specification
PROG_B
Recommend
open-drain
TMS
TDO
TCK
driver
TDI
+2.5V
JTAG
R
Variant Select
SPI Mode
‘0’
‘0’
‘1’
‘1’
‘1’
‘0’
P
Figure 54: Atmel SPI-based DataFlash Configuration Interface
HSWAP
M2
M1
M0
VS2
VS1
VS0
TDI
TMS
TCK
PROG_B
Spartan-3E
VCCINT
FPGA
+1.2V
GND
VCCO_0
VCCAUX
VCCO_2
CSO_B
DONE
INIT_B
DOUT
MOSI
CCLK
TDO
DIN
VCCO_0
+3.3V
+2.5V
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I
W
‘1’
+3.3V
P
SI
SO
CS
WP
RESET
RDY/BUSY
SCK
+2.5V
+3.3V
GND
VCC
DataFlash
AT45DB
PROG_B
Atmel
INIT_B
Power-on monitor is only required if
+3.3V (VCCO_2) supply is the last supply
in power-on sequence, after VCCINT
and VCCAUX. Must delay FPGA
configuration for > 20 ms after SPI
DataFlash reaches its minimum VCC.
Force FPGA INIT_B input OR PROG_B
input Low with an open-drain or open-
collector driver.
Power-On
Power-On
Monitor
Monitor
+3.3V
+3.3V
Functional Description
or
DS312-2_50a_082009
77