XC3S500E-4FG320C Xilinx Inc, XC3S500E-4FG320C Datasheet - Page 105
![no-image](/images/no-image-200.jpg)
XC3S500E-4FG320C
Manufacturer Part Number
XC3S500E-4FG320C
Description
FPGA Spartan-3E Family 500K Gates 10476 Cells 572MHz 90nm (CMOS) Technology 1.2V 320-Pin FBGA
Manufacturer
Xilinx Inc
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S500E-4FG320C
Package
320FBGA
Family Name
Spartan-3E
Device Logic Cells
10476
Device Logic Units
1164
Device System Gates
500000
Number Of Registers
9312
Maximum Internal Frequency
572 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
232
Ram Bits
368640
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DS312-2 (v3.8) August 26, 2009
Product Specification
R
No
No
and V
Figure 67: General Configuration Process
Sample mode pins
Clear configuration
Load configuration
and V
INIT_ B = High?
Reconfigure?
data frames
V
Yes
User mode
Power-On
CCO
Yes
sequence
Yes
CCINT
Start-Up
correct?
memory
CCAUX
CRC
Bank 2 > 1V
>1V
> 2V
www.xilinx.com
Yes
DONE pin goes High,
signaling end of
configuration
No
M[2:0] and VS[2:0]
pins are sampled on
INIT_B rising edge
No
Yes
Set PROG_B Low
after Power-On
PROG_B = Low
INIT_B goes Low.
Abort Start-Up
No
DS312-2_58_051706
Functional Description
105
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