PC82573E Intel, PC82573E Datasheet - Page 12

• Manufacturer Part Number: PC82573E
• Description: Ethernet CTLR Single Chip 10Mbps/100Mbps/1000Mbps 1.2V/2.5V/3.3V 196-Pin TFBGA
• Manufacturer: Intel

Specifications of PC82573E

• Package: 196TFBGA
• Standard Supported: IEEE 1149.1|IEEE 802.3|IEEE 802.3ab|IEEE 802.3q1|IEEE 802.3x
• Communication Mode: Full Duplex|Half Duplex
• Data Rate: 10|100|1000 Mbps
• Host Interface: PCI
• Operating Supply Voltage: 1.2|2.5|3.3 V
• Dma Support: Yes
• Maximum Power Dissipation: 1.35 W

2.4
2.5
2.5.1
12
Non-Volatile Memory Interface Signals
Miscellaneous Signals
Reset and Power-down Signals
NVM_SI
NVM_SO
NVM_SK
NVM_CS#
NVM_REQ
NVM_PROT
NVM_TYPE
NVM_SHARED#
LAN_PWR_
GOOD
DEVICE_OFF#
Signal
Signal
I/O
I
O
TS
I/O
O
I/PU
I/PU
I/PU
I
I
Type
Type
NVM Serial Data Output
The data output pin is used for input to the non-volatile memory device. This pin is
occasionally used as input during arbitration. This signal has an internal pull-up
resistor.
NVM Serial Data Input
The data input pin is used for output from the non-volatile memory device to the
82573. This signal has an internal pull-up resistor.
NVM Serial Clock
The serial clock provides the clock rate for the memory interface.
NVM Chip Enable
This signal is used to enable the device. This signal has an internal pull-up resistor.
NVM Arbitration Request.
This signal is used to request use of the NVM interface.
NVM Protection Enable.
This pin should be connected to ground to disable NVM protection; otherwise, NVM
protection is enabled. This signal has an internal pull-up resistor.
NVM Device Type
If the device uses a Flash, this pin should be connected to a pull-down resistor. If
the 82573 is connected to an EEPROM, this pin can be connected to an external
pull-up resistor. This signal has an internal pull-up resistor of 30 KΩ ±50%.
NVM Shared Enable
This pin should be connected to a pull-down resistor to enable sharing of SPI Flash
with ICH. This signal has an internal pull-up resistor.
LAN Power Good
This signal indicates that stable power is available to the 82573. When the signal is
low, LAN_PWR_GOOD acts as a master reset of the entire device. LAN_PWR_GOOD
should be connected to a power supervisor driven from auxiliary power. The signal
should go active approximately 80 ms after all power rails are within their
operating ranges.
A PCIe* reset must only occur after LAN Power Good is active.
Device Off
This asynchronously disables the 82573, including voltage regulator control
outputs if selected in external control.
Name and Function
Name and Function
82573—Datasheet