MACH445-15YC Lattice, MACH445-15YC Datasheet - Page 7

• Manufacturer Part Number: MACH445-15YC
• Description: CPLD MACH 4 Family 128 Macro Cells 47.6MHz EECMOS Technology 5V 100-Pin PQFP Tray
• Manufacturer: Lattice

Specifications of MACH445-15YC

• Package: 100PQFP
• Family Name: MACH 4
• Number Of Macro Cells: 128
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 64
• Number Of Logic Blocks/elements: 8
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 47.6 MHz
• Number Of Product Terms Per Macro: 20
• Memory Type: EEPROM
• Re-programmability Support: Yes
• Operating Temperature: 0 to 70 °C

Five-Volt Programming
Another benefit from the JTAG circuitry that we have
derived is the ability to use the JTAG port for five-volt
programming. This allows the device to be soldered to
the board before programming. Once the device is
attached, the delicate Plastic Quad Flat Pack, or PQFP,
leads are protected from programming and testing
operations that could potentially damage them. Pro-
gramming and verification of the device is done serially
which is ideal for on-board programming since it only
requires the use of the Test Access Port. Use of the
programming Enable Pin (ENABLE*) is optional.
MACH445-12/15/20
Zero-Hold-Time Input Register
The MACH445 device has a zero-hold time (ZHT) fuse.
This fuse controls the time delay associated with loading
data into all I/O cell registers and latches in the
MACH445 device.
When programmed, the ZHT fuse increases the data
path setup delays to input storage elements, matching
equivalent delays in the clock path. When the fuse is
erased, the setup time to the input storage element is
minimized and the device timing is compatible with the
MACH435 device.
This feature facilitates doing worst-case designs for
which data is loaded from sources which have low (or
zero) minimum output propagation delays from clock
edges.
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