72841L25TF Integrated Device Technology (Idt), 72841L25TF Datasheet - Page 16

• Manufacturer Part Number: 72841L25TF
• Description: FIFO Mem Sync Quad Depth/Width Bi-Dir 4K x 9 x 2 64-Pin STQFP
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 72841L25TF

• Package: 64STQFP
• Configuration: Quad
• Bus Directional: Bi-Directional
• Density: 72 Kb
• Organization: 4Kx9x2
• Data Bus Width: 9 Bit
• Timing Type: Synchronous
• Expansion Type: Depth|Width
• Typical Operating Supply Voltage: 5 V
• Operating Temperature: 0 to 70 °C

can be adapted to applications that require greater than 256/512/1,024/
2,048/4,096/8,192 words. The existence of double enable pins on the read
and write ports allow depth expansion. The Write Enable 2/Load (WENA2,
WENB2) pins are used as a second write enables in a depth expansion
configuration, thus the Programmable flags are set to the default values.
Depth expansion is possible by using one enable input for system control
while the other enable input is controlled by expansion logic to direct the flow
of data. A typical application would have the expansion logic alternate data
ORDERING INFORMATION
NOTES:
1. Industrial temperature range product for 15ns and 25ns speed grade are available as a standard device.
2. Green parts are available. For specific speeds and packages contact your sales office.
DATASHEET DOCUMENT HISTORY
04/24/2001
02/10/2006
01/13/2009
Device Type
XXXXX
DEPTH EXPANSION — IDT72801/72811/72821/72831/72841/72851
Power
X
pgs. 4, 5 and 16.
pgs. 1 and 16.
pg. 16.
Speed
XX
CORPORATE HEADQUARTERS
6024 Silver Creek Valley Road
San Jose, CA 95138
Package
XX
X
Temperature
Process/
Range
X
for SALES:
800-345-7015 or 408-284-8200
fax: [phone]
www.idt.com
16
access from one device to the next in a sequential manner. These FIFOs operate
in the Depth Expansion configuration when the following conditions are met:
that these pins operate as second Write Enables.
CHRONOUS FIFOs USING THE RING COUNTER APPROACH" for details
of this configuration.
BLANK
PF
TF
I
G
L
10
15
25
72801
72811
72821
72841
72851
72831
(1)
1. WENA2/LDA and WENB2/LDB pins are held HIGH during Reset so
2. External logic is used to control the flow of data.
Please see the Application Note" DEPTH EXPANSION OF IDT'S SYN-
(2)
Thin Quad Flatpack (TQFP, PN64-1)
Slim Thin Quad Flatpack(STQFP, PP64-1)
Commercial Only
Commercial and Industrial
Commercial and Industrial
Low Power
256 x 9 Dual SyncFIFO
512 x 9 Dual SyncFIFO
1,024 x 9 Dual SyncFIFO
2,048 x 9 Dual SyncFIFO
4,096 x 9 Dual SyncFIFO
8,192 x 9 Dual SyncFIFO
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)
Green
Clock Cycle Time
Nanoseconds
(t
CLK
), Speed in
3034 drw 19
email: [e-mail]
for Tech Support:
408-360-1753