SAB-C165-LM Infineon Technologies, SAB-C165-LM Datasheet - Page 51

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SAB-C165-LM

Manufacturer Part Number
SAB-C165-LM
Description
MCU 16-Bit C166 CISC/RISC ROMLess 5V 100-Pin MQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAB-C165-LM

Package
100MQFP
Family Name
C166
Maximum Speed
20 MHz
Ram Size
2 KB
Operating Supply Voltage
5 V
Data Bus Width
16 Bit
Program Memory Type
ROMLess
Number Of Programmable I/os
77
Interface Type
ASC/SSC
Operating Temperature
0 to 70 °C
Number Of Timers
5

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Multiplexed Bus (Standard Supply Voltage Range) (cont’d)
(Operating Conditions apply)
ALE cycle time = 6 TCL + 2
Parameter
Address float after RdCS,
WrCS (with RW delay)
Address float after RdCS,
WrCS (no RW delay)
RdCS to Valid Data In
(with RW delay)
RdCS to Valid Data In
(no RW delay)
RdCS, WrCS Low Time
(with RW delay)
RdCS, WrCS Low Time
(no RW delay)
Data valid to WrCS
Data hold after RdCS
Data float after RdCS
Address hold after
RdCS, WrCS
Data hold after WrCS
1)
Data Sheet
These parameters refer to the latched chip select signals (CSxL). The early chip select signals (CSxE) are
specified together with the address and signal BHE (see figures below).
t
Symbol
t
t
t
t
t
t
t
t
t
t
t
A
44
45
46
47
48
49
50
51
52
54
56
+
t
CC –
CC –
CC 30 +
CC 50 +
CC 26 +
CC 20 +
CC 20 +
SR –
SR –
SR 0
SR –
C
+
t
F
min.
Max. CPU Clock
(120 ns at 25 MHz CPU clock without waitstates)
= 25 MHz
t
t
t
t
t
47
C
C
C
F
F
max.
0
20
16 +
36 +
20 +
t
t
t
C
C
F
1 / 2TCL = 1 to 25 MHz
min.
2TCL - 10
+
3TCL - 10
+
2TCL - 14
+
0
2TCL - 20
+
2TCL - 20
+
Variable CPU Clock
t
t
t
t
t
C
C
C
F
F
max.
2TCL - 24
3TCL - 24
2TCL - 20
0
TCL
+
+
+
t
t
t
C
C
F
V2.0, 2000-12
C165
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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