MT90820AL Zarlink, MT90820AL Datasheet - Page 32

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MT90820AL

Manufacturer Part Number
MT90820AL
Description
Switch Fabric 2K x 2K/1K x 1K/512 x 512 131.072Mbps 5V 100-Pin MQFP Tray
Manufacturer
Zarlink
Datasheet

Specifications of MT90820AL

Package
100MQFP
Number Of Ports
16
Fabric Size
2K x 2K|1K x 1K|512 x 512
Switching Bandwidth
131.072 Mbps
Switch Core
Non-Blocking
Port Speed
2.048|4.096|8.192 Mbps
Operating Supply Voltage
5 V

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AC Electrical Characteristics - Multiplexed Bus Timing (Mode 2)
10 R/W setup from DS rising
11 R/W hold after DS falling
12 Data hold after read
13 DS delay after AS falling
14 Acknowledgment Delay:
15 Acknowledgment Hold Time
Note 1. High Impedance is measured by pulling to the appropriate rail with R
1
2
3
4
5
6
7
8
9
AS pulse width
Address setup from AS falling
Address hold from AS falling
Data setup from DTA Low on Read
CS hold after DS falling
CS setup from DS rising
Data hold after write
Data setup from DS -Write (fast write)
Valid Data Delay on write (slow write)
AD0-AD7
Reading/Writing Registers
Reading/Writing Memory, @ 2Mb/s
D8-D15
DTA
ALE
WR
RD
CS
Characteristics
HiZ
t
t
ADS
@ 8Mb/s
ALW
@ 4Mb/s
Figure 15 - Multiplexed Bus Timing (Mode 1)
ADDRESS
t
ALWR
t
t
ADH
ALRD
t
t
CSW
CSR
Zarlink Semiconductor Inc.
t
Sym.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
DHW
ASW
ADH
DWS
SWD
RWH
AKD
AKH
ADS
DDR
RWS
DHR
DSH
CSH
CSS
MT90820
t
SWD
HiZ
32
Min.
t
80
10
10
10
10
25
60
10
10
10
AKD
0
0
L
, with timing corrected to cancel time taken to discharge C
t
DDR
Typ.
50
45
t
t
RW
WW
t
DSW
DATA
760/780
400/420
220/240
Max.
55/60
122
75
80
t
t
t
DHR
CSRW
DHW
Units
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AKH
C
C
Note 1
C
C
C
C
C
Note 1
L
L
L
L
L
L
L
HiZ
=150pF
=150pF, R
=150pF
=150pF
=150pF
=150pF
=150pF, R
Test Conditions
Data Sheet
L
.
L
L
=1K,
=1K,
V
V
V
V
V
V
TT
TT
TT
TT
TT
TT

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