CS4299-JQ Cirrus Logic Inc, CS4299-JQ Datasheet - Page 45
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CS4299-JQ
Manufacturer Part Number
CS4299-JQ
Description
Audio Codec 1ADC / 1DAC 18-Bit/20-Bit 48-Pin LQFP
Manufacturer
Cirrus Logic Inc
Type
PCMr
Datasheet
1.CS4299-JQ.pdf
(52 pages)
Specifications of CS4299-JQ
Package
48LQFP
Adc/dac Resolution
18/20 Bit
Number Of Channels
1ADC /1 DAC
Sampling Rate
48 KSPS
Number Of Adc Inputs
8
Number Of Dac Outputs
3
Number Of Dacs
1
Operating Supply Voltage
3.3|5 V
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DS319PP6
Analog Reference, Filters, and Configuration
REFFLT - Internal Reference Voltage, Input, Pin 27
Vrefout - Voltage Reference, Output, Pin 28
AFLT1 - Left ADC Channel Antialiasing Filter, Input, Pin 29
AFLT2 - Right ADC Channel Antialiasing Filter, Input, Pin 30
FLTI, FLTO - 3D Filter, Input, Pin 33 and 34
FLT3D - 3D Filter, Input, Pin 32
BCFG - Beep Configuration, Input, Pin 31
Misc. Digital Interfaces
S/PDIF_OUT - Sony/Philips Digital Interface, Output, Pin 48
EAPD - External Amplifier Powerdown, Output, Pin 47
This signal is the voltage reference used internal to the CS4299. A 0.1 µF and a 1.0 µF (must not be
larger than 1 µF) capacitor with short, wide traces must be connected to this pin. No other connections
should be made to this pin.
All analog inputs and outputs are centered around Vrefout, nominally 2.3 Volts. This pin may be used to
level shift external circuitry. This pin cannot drive any DC loads, thus any external loading must be
buffered.
This pin needs a 1000 pF NPO capacitor connected to analog ground.
This pin needs a 1000 pF NPO capacitor connected to analog ground.
A 1000 pF capacitor must be connected between FLTI and FLTO if the 3D function is used.
A 0.01 µF capacitor must be connected from this pin to AGND if the 3D function is used.
This pin is the configuration control for the PC_BEEP bypass path. If this pin is grounded, the bypass
path is disabled. If this pin is left floating, the PC_BEEP bypass path is enabled.
This pin generates the S/PDIF digital output from the CS4299 when the SPEN bit in the S/PDIF Control
Register (Index 68h) is ‘set’. This output may be used to directly drive a resistive divider and coupling
transformer to an RCA-type connector for use with consumer audio equipment.
This pin is used to control the powerdown state of an audio amplifier external to the CS4299. The
output is controlled by the EAPD bit in the Powerdown Ctrl/Stat Register (Index 26h). It is driven as a
normal CMOS output and defaults low (‘0’) upon power-up.
CS4299
CS4299
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