CS4299-JQ Cirrus Logic Inc, CS4299-JQ Datasheet - Page 30

• Manufacturer Part Number: CS4299-JQ
• Description: Audio Codec 1ADC / 1DAC 18-Bit/20-Bit 48-Pin LQFP
• Manufacturer: Cirrus Logic Inc
• Type: PCMr

Specifications of CS4299-JQ

• Package: 48LQFP
• Adc/dac Resolution: 18/20 Bit
• Number Of Channels: 1ADC /1 DAC
• Sampling Rate: 48 KSPS
• Number Of Adc Inputs: 8
• Number Of Dac Outputs: 3
• Number Of Dacs: 1
• Operating Supply Voltage: 3.3|5 V

4.18
DDM
AMAP
SM[1:0]
Default
4.19
LOSM
Default
30
30
D15
D15
0
0
AC Mode Control Register (Index 5Eh)
Misc. Crystal Control Register (Index 60h)
D14
D14
0
0
D13
D13
0
0
Slot Map Mode 0
Slot Map Mode 1
Slot Map Mode 2
Slot Map Mode 3
AMAP Mode 0
AMAP Mode 1
AMAP Mode 2
AMAP Mode 3
‘set’, the L/R DACs directly drive the line and alternate line outputs by bypassing the audio mix-
er. When ‘clear’, the audio mixer is the source for the line and alternate line outputs.
based slot mapping as outlined in the AC ’97 2.1 specification. The bit is shadowed in the Ex-
tended Audio ID Register (Index 28h). Refer to Table 8 for the slot mapping configurations.
‘cleared’. Refer to Table 8 for the slot mapping configurations.
DAC Direct Mode. This bit controls the source to the line and alternate line output drivers. When
Slot Map. The SM[1:0] bits define the Slot Mapping for the CS4299 when the AMAP bit is
0080h
Audio Slot Mapping. This read/write bit controls whether the CS4299 responds to the Codec ID
Assignment
is ‘set’, the CS4299 will mute all analog outputs for the duration of loss of SYNC. If this bit is
‘cleared’, the mixer will continue to function normally during loss of SYNC. The CS4299 ex-
pects to sample SYNC ‘high’ for 16 consecutive BIT_CLK periods and then ‘low’ for 240 con-
secutive BIT_CLK periods, otherwise loss of SYNC becomes true.
Loss of SYNC Mute Enable. The LOSM bit controls the loss of SYNC mute function. If this bit
0023h
D12
D12
Mode
0
0
Slot
D11
D11
0
D10
D10
Codec ID
ID1 ID0 SM1 SM0
Reserved
0
X
X
X
X
0
0
1
1
X
X
X
X
0
1
0
1
D9
D9
0
Table 8. Slot Mapping
Slot Map
X
X
X
X
0
0
1
1
DDM AMAP
D8
D8
X
X
X
X
0
1
0
1
D7
D7
0
AMAP
1
1
1
1
0
0
0
0
D6
D6
0
0
SM1
L
3
3
7
6
3
5
7
9
D5
D5
SPDIF
Slot Assignments
Reserved
DAC,
10
R
4
4
8
9
4
6
8
SM0
D4
D4
L
3
3
7
6
3
5
7
9
D3
ADC
D3
0
0
10
R
4
4
8
9
4
6
8
D2
D2
Reserved
0
CS4299
D1
D1
CS4299
0
DS319PP6
LOSM
D0
D0
0