MACH210-15JC Lattice, MACH210-15JC Datasheet - Page 4

• Manufacturer Part Number: MACH210-15JC
• Description: CPLD MACH 2 Family 64 Macro Cells 66.6MHz EECMOS Technology 5V 44-Pin PLCC
• Manufacturer: Lattice

Specifications of MACH210-15JC

• Package: 44PLCC
• Family Name: MACH 2
• Number Of Macro Cells: 64
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 32
• Number Of Logic Blocks/elements: 4
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 66.6 MHz
• Number Of Product Terms Per Macro: 16
• Memory Type: EEPROM
• Re-programmability Support: Yes
• Operating Temperature: 0 to 70 °C

CONNECTION DIAGRAM
Top View
PIN DESIGNATIONS
CLK/I =
GND =
I
I/O
V
4
CC
=
=
=
Clock or Input
Ground
Input
Input/Output
Supply Voltage
Note:
Pin-compatible with MACH111 and MACH211.
CLK0/I2
I/O10
I/O11
GND
I/O5
I/O6
I/O7
I/O8
I/O9
I0
I1
1
2
3
4
5
6
7
8
9
10
11
MACH210-7/10/12/15/20, Q-12/15/20
TQFP
33
32
31
30
29
28
27
26
25
24
23
I/O27
I/O26
I/O25
I/O24
CLK1/I5
GND
I4
I3
I/O23
I/O22
I/O21
14128I-3