HD4074329S Renesas Electronics America, HD4074329S Datasheet - Page 26
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HD4074329S
Manufacturer Part Number
HD4074329S
Description
MCU 4-Bit HMCS400 CISC 20KB EPROM 3.3V/5V 64-Pin SDIP
Manufacturer
Renesas Electronics America
Datasheet
1.HD4074329S.pdf
(98 pages)
Specifications of HD4074329S
Package
64SDIP
Family Name
HMCS400
Maximum Speed
4.5 MHz
Ram Size
268 Byte
Program Memory Size
20 KB
Operating Supply Voltage
3.3|5 V
Data Bus Width
4 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
35
On-chip Adc
4-chx8-bit
Operating Temperature
-20 to 75 °C
Number Of Timers
3
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HD404328 Series
Interrupt Enable Flag (IE: $000, Bit 0): Controls the entire interrupt process. It is reset by the interrupt
processing and set by the RTNI instruction, as shown in table 4.
Table 4
0
1
External Interrupts (INT
External Interrupt Request Flags (IF0: $000, Bit 2; IF1: $001, Bit 0): Set at the rising or falling
edges of the INT
Table 5
0
1
IF0 is set at the falling edge of signals input to INT
input to INT
figure 9.
22
IE
IF0, IF1
Bit 3
0
1
1
. The INT
Interrupt Enable Flag
External Interrupt Request Flags
IMR
Interrupt Enabled/Disabled
Disabled
Enabled
Interrupt Request
No
Yes
0
Bit 2
and INT
Interrupt mode register (IMR): $010
0
1
0
1
3
1
interrupt edge is selected by the interrupt mode register (IMR: $010), as shown in
1
0
, INT
No detection
Falling-edge detection
Rising-edge detection
Double-edge detection
inputs, as shown in table 5.
ZCD Detection Edge
2
1
): Specified by port mode register A (PMRA: $004).
Figure 9 Interrupt Mode Register
1
0
Initial value: 0000, R/W: W
0
, and IF1 is set at the rising and falling edges of signals
INT detection edge selection
ZCD detection edge selection
Bit 1
1
0
1
IMR
Bit 0
0
1
0
1
No detection
Falling-edge detection
Rising-edge detection
Double-edge detection
INT Detection Edge
1
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