HD4074329S Renesas Electronics America, HD4074329S Datasheet - Page 15

• Manufacturer Part Number: HD4074329S
• Description: MCU 4-Bit HMCS400 CISC 20KB EPROM 3.3V/5V 64-Pin SDIP
• Manufacturer: Renesas Electronics America

Specifications of HD4074329S

• Package: 64SDIP
• Family Name: HMCS400
• Maximum Speed: 4.5 MHz
• Ram Size: 268 Byte
• Program Memory Size: 20 KB
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 4 Bit
• Program Memory Type: EPROM
• Number Of Programmable I/os: 35
• On-chip Adc: 4-chx8-bit
• Operating Temperature: -20 to 75 °C
• Number Of Timers: 3

32
33
34
35
SP:
Note: Bits in the interrupt control bits area and register flag area are set by the SEM or SEMD instruction,
Note: WDON is reset by MCU reset.
0
1
2
3
IM:
IE:
IF:
(Direct transfer on flag)
(IM of serial interface)
WDON
DTON
Interrupt request flag
Interrupt mask
Interrupt enable flag
Stack pointer
RSP
(IM of timer A)
(IM of timer C)
reset by the REM or REMD instruction, and tested by the TM or TMD instruction. Other
instructions have no effect.
However, note the following usage limitations of RAM bit manipulation instructions.
IF
DTON is always reset in active mode.
If the TM or TMD instruction is executed for the inhibited bits or non-existing bits,
the value in ST becomes invalid.
(IM of INT )
(IM of A/D)
DTON
IMTA
IMTC
IMAD
Bit 3
IMS
IM0
Figure 3 Configuration of Interrupt Control Bits and Register Flag Areas
Not executed in active mode
0
Used in subactive mode
Not executed
Not executed
SEM/SEMD
(IF of serial interface)
Allowed
(A/D start flag)
(IF of timer A)
(IF of timer C)
(IF of INT )
(IF of A/D)
ADSF
IFAD
IFTA
IFTC
Bit 2
IFS
IF0
0
Not used
(Watchdog on flag)
Not executed
(Reset SP bit)
(IM of timer B)
REM/REMD
(IM of ZCD)
(IM of INT )
Allowed
Allowed
Allowed
WDON
IMZC
IMTB
Bit 1
RSP
IM1
1
(Interrupt enable flag)
(Low speed on flag)
(IF of timer B)
(IF of ZCD)
(IF of INT )
TM/TMD
Inhibited
Inhibited
Allowed
Allowed
LSON
Bit 0
IFTB
IFZC
HD404328 Series
IF1
IE
1
$000
$001
$002
$003
$020
$021
$022
$023
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