MAX198BCNI Maxim Integrated Products, MAX198BCNI Datasheet - Page 9
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MAX198BCNI
Manufacturer Part Number
MAX198BCNI
Description
ADC Single SAR 100KSPS 12-Bit Parallel 28-Pin PDIP N
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX196BCAI.pdf
(16 pages)
Specifications of MAX198BCNI
Package
28PDIP N
Resolution
12 Bit
Sampling Rate
100 KSPS
Architecture
SAR
Number Of Adcs
1
Number Of Analog Inputs
6
Digital Interface Type
Parallel
Input Type
Voltage
Polarity Of Input Voltage
Unipolar|Bipolar
Table 5. Channel Selection
Table 2. Control-Byte Format
Table 3. Range and Polarity Selection
BIP
D7 (MSB)
0
0
1
1
2, 1, 0
A2
PD1
BIT
7, 6
0
0
0
0
1
1
5
4
3
RNG
0
1
0
1
INPUT RANGE (V)
A2, A1, A0
ACQMOD
PD1, PD0
A1
_______________________________________________________________________________________
0
0
1
1
0
0
NAME
RNG
PD0
BIP
(MAX196)
D6
0 to 10
0 to 5
±10
±5
These two bits select the clock and power-down modes (Table 4).
0 = internally controlled acquisition (6 clock cycles), 1 = externally controlled acquisition
Selects the full-scale voltage magnitude at the input (Table 3).
Selects unipolar or bipolar conversion mode (Table 3).
These are address bits for the input mux to select the “on” channel (Table 5).
A0
0
1
0
1
0
1
ACQMOD
Multirange, Single +5V, 12-Bit DAS
D5
INPUT RANGE (V)
0 to V
(MAX198)
0 to V
±V
±V
CH0
REF
REF
REF
REF
/2
/2
RNG
D4
with 12-Bit Bus Interface
CH1
Table 4. Clock and Power-Down Selection
PD1 PD0
0
0
1
1
BIP
D3
DESCRIPTION
0
1
0
1
CH2
Normal Operation / External Clock Mode
Normal Operation / Internal Clock Mode
Standby Power-Down (STBYPD); clock mode
is unaffected
Full Power-Down (FULLPD); clock mode is
unaffected
D2
A2
CH3
DEVICE MODE
D1
A1
CH4
D0 (LSB)
A0
CH5
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