MAX198BCNI Maxim Integrated Products, MAX198BCNI Datasheet - Page 8

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MAX198BCNI

Manufacturer Part Number
MAX198BCNI
Description
ADC Single SAR 100KSPS 12-Bit Parallel 28-Pin PDIP N
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX198BCNI

Package
28PDIP N
Resolution
12 Bit
Sampling Rate
100 KSPS
Architecture
SAR
Number Of Adcs
1
Number Of Analog Inputs
6
Digital Interface Type
Parallel
Input Type
Voltage
Polarity Of Input Voltage
Unipolar|Bipolar
Acquisition time is calculated as follows:
where R
V
In the external acquisition control mode (D5 = 1), the
T/H enters its tracking mode on the first WR rising edge
and enters its hold mode when it detects the second
WR rising edge with D5 = 0 (see External Acquisition
section).
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
Figure 3. Operational Diagram
Figure 4. Equivalent Input Circuit
8
REF
S1 = BIPOLAR/UNIPOLAR SWITCH
S2 = INPUT MUX SWITCH
S3, S4 = T/H SWITCH
CH_
For 0V to V
For 0V to V
CONTROL
INPUTS
_______________________________________________________________________________________
range) or 3µs (0V to V
P
P DATA BUS
R1
100pF
IN
= 7kΩ and t
REF
REF
25
26
10
11
12
13
14
5.12k
1
2
3
4
5
6
7
8
9
: t
/2: t
WR
CS
D8
D3
D1
CLK
RD
D11
D10
D9
D7
D6
D5
D4
D2
D0
S1
S2
R2
AZ
AZ
MAX196
MAX198
= 9 x (R
HOLD
AZ
= 9 x (R
R1 = 12.5k (MAX196) OR 5.12k (MAX198)
R2 = 8.67k (MAX196) OR
BIPOLAR
ON
UNIPOLAR
is never less than 2µs (0V to
OFF
REF
REFADJ
DGND
AGND
CH5
CH4
CH3
CH2
CH1
CH0
S
V
REF
INT
/2 range).
DD
S3
+ R
S
TRACK
+ R
28
27
23
22
24
21
20
19
18
17
16
15
IN
C
0.01 F
HOLD
4.7 F
IN
) x 16pF
TRACK
) x 32pF
OUTPUT STATUS
S4
0.01 F
ANALOG
(MAX198)
4.7 F
INPUTS
VOLTAGE
REFERENCE
T/H
OUT
HOLD
+5V
The ADC’s input tracking circuitry has a 5MHz small-
signal bandwidth. When using the internal acquisition
mode with an external clock frequency of 2MHz, a
100ksps throughput rate can be achieved. It is possible
to digitize high-speed transient events and measure
periodic signals with bandwidths exceeding the ADC’s
sampling rate by using undersampling techniques. To
avoid high-frequency signals being aliased into the fre-
quency band of interest, anti-alias filtering is recom-
mended (MAX274/MAX275 continuous-time filters).
Figure 4 shows the equivalent input circuit. The full-
scale input voltage depends on the voltage at the refer-
ence (V
allows input voltage ranges of ±10V, ±5V, 0V to +10V,
or 0V to +5V with a 4.096V voltage reference (Table 1).
Program the desired range by setting the appropriate
control bits (D3, D4) in the control byte (Tables 2 and
3). The MAX198 does not use a scaling factor, so its
input voltage range directly corresponds with the refer-
ence voltage. It can be programmed for input voltages
of ±V
3). When an external reference is applied at REFADJ,
the voltage at REF is given by V
(2.4V < V
The input channels are overvoltage protected to
±16.5V. This protection is active even if the device is in
power-down mode.
Even with V
current-limiting that adequately protects the device.
Input data (control byte) and output data are multi-
plexed on a three-state parallel interface. This parallel
I/O can easily be interfaced with a µP. CS, WR, and RD
control the write and read operations. CS is the stan-
dard chip-select signal, which enables a µP to address
the MAX196/MAX198 as an I/O port. When high, it dis-
ables the WR and RD inputs and forces the interface
into a high-Z state.
Table 1. Full Scale and Zero Scale
(MAX196 only)
RANGE (V) ZERO SCALE (V) -FULL SCALE +FULL SCALE
0 to +10
0 to +5
±10
±5
REF
REF
, ±V
REF
). The MAX196 uses a scaling factor, which
DD
REF
< 4.18V).
= 0V, the input resistive network provides
/2, 0V to V
0
0
Input Range and Protection
-V
-V
REF
REF
REF
, or 0V to V
REF
x 1.2207 V
x 2.4414 V
Input Bandwidth
Digital Interface
= 1.6384 x V
V
V
REF
REF
REF
REF
REF
/2 (Table
x 1.2207
x 2.4414
x 1.2207
x 2.4414
REFADJ

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