MAX198BCNI Maxim Integrated Products, MAX198BCNI Datasheet - Page 4
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MAX198BCNI
Manufacturer Part Number
MAX198BCNI
Description
ADC Single SAR 100KSPS 12-Bit Parallel 28-Pin PDIP N
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX196BCAI.pdf
(16 pages)
Specifications of MAX198BCNI
Package
28PDIP N
Resolution
12 Bit
Sampling Rate
100 KSPS
Architecture
SAR
Number Of Adcs
1
Number Of Analog Inputs
6
Digital Interface Type
Parallel
Input Type
Voltage
Polarity Of Input Voltage
Unipolar|Bipolar
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
ELECTRICAL CHARACTERISTICS (continued)
(V
with 50% duty cycle; T
4
Supply Voltage
REFERENCE INPUT (buffer disabled, reference input applied to REF pin)
Input Voltage Range
Input Current
Input Resistance
REFADJ Threshold for
Buffer Disable
POWER REQUIREMENTS
Supply Current
Power-Supply Rejection Ratio
(Note 8)
TIMING
Internal Clock Frequency
External Clock Frequency Range
Acquisition Time
Conversion Time
Throughput Rate
Bandgap Reference
Start-Up Time
Reference Buffer Settling
DIGITAL INPUTS (D7–D0, CLK, RD, WR, CS) (Note 11)
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Capacitance
DD
_______________________________________________________________________________________
= 5V ±5%; unipolar/bipolar range; external reference mode, V
PARAMETER
A
= T
MIN
to T
MAX
SYMBOL
t
PSRR
t
t
ACQE
CONV
V
f
f
V
V
ACQI
I
C
CLK
CLK
I
; unless otherwise noted. Typical values are at T
DD
INH
INL
DD
IN
IN
To 0.1mV REF bypass
capacitor fully discharged
V
4.18V
Normal, or STANDBY power-down mode
FULL power-down mode
Normal mode, bipolar ranges
Normal mode, unipolar ranges
STANDBY power-down mode
FULL power-down mode (Note 7)
External reference = 4.096V
Internal reference
C
Internal acquisition
External acquisition (Note 9)
After FULLPD or STBYPD
External CLK
Internal CLK, C
External CLK
Internal CLK, C
Power-up (Note 10)
V
(Note 5)
REF
IN
CLK
= 0V or V
=
= 100pF
FULL power-down mode
Normal, or STANDBY
power-down mode
DD
CLK
CLK
CONDITIONS
= 100pF
= 100pF
REF
= 4.096V; 4.7µF at REF pin; external clock, f
External CLK
Internal CLK
C
C
REF
REF
= 4.7µF
= 33µF
A
= +25°C.)
V
DD
4.75
1.25
MIN
2.4
0.1
3.0
3.0
3.0
6.0
6.0
2.4
10
62
5
- 50mV
±0.1
TYP
±
1.56
700
200
7.7
60
60
6
1
5
8
/
2
MAX
4.18
5.25
±
2.00
10.0
400
850
120
100
±10
2.0
5.0
0.8
18
10
15
CLK
1
1
/
2
= 2.0MHz
UNITS
MHz
MHz
ksps
LSB
MΩ
mA
kΩ
ms
µA
µA
µA
pF
µs
µs
µs
V
V
V
V
V