74LVC2G17GW-G NXP Semiconductors, 74LVC2G17GW-G Datasheet - Page 12

Buffers & Line Drivers 3.3V DUAL SCHMITT TRIGGER BUFF

74LVC2G17GW-G

Manufacturer Part Number
74LVC2G17GW-G
Description
Buffers & Line Drivers 3.3V DUAL SCHMITT TRIGGER BUFF
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC2G17GW-G

Logic Family
LVC
Logic Type
CMOS
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-363-6
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
2 / 2
Propagation Delay Time
3.8 ns at 2.7 V
Lead Free Status / Rohs Status
 Details
Other names
74LVC2G17GW,125
NXP Semiconductors
Fig 15. Package outline SOT886 (XSON6)
74LVC2G17
Product data sheet
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm
VERSION
OUTLINE
SOT886
max
A
0.5
(1)
max
0.04
A
terminal 1
index area
1
e
0.25
0.17
b
(2)
L
1
IEC
1.5
1.4
D
1.05
0.95
1
6
E
0
e
MO-252
JEDEC
1
0.6
All information provided in this document is subject to legal disclaimers.
e
REFERENCES
D
0.5
2
5
e
1
Rev. 5 — 6 August 2010
e
0.35
0.27
1
L
Dual non-inverting Schmitt trigger with 5 V tolerant input
JEITA
b
0.40
0.32
scale
L
3
4
1
1
A
L
1
E
A
(2)
2 mm
PROJECTION
EUROPEAN
74LVC2G17
© NXP B.V. 2010. All rights reserved.
ISSUE DATE
04-07-15
04-07-22
SOT886
12 of 19

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