74LVC02AD NXP Semiconductors, 74LVC02AD Datasheet - Page 12

Gates (AND / NAND / OR / NOR) 3.3V QUAD 2-INPUT NOR GATE

74LVC02AD

Manufacturer Part Number
74LVC02AD
Description
Gates (AND / NAND / OR / NOR) 3.3V QUAD 2-INPUT NOR GATE
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC02AD

Product
NOR
Logic Family
LVC
Number Of Gates
Quad
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
2.1 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-108
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
 Details
Other names
74LVC02AD,112

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Manufacturer
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Philips Semiconductors
2004 Mar 12
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
Quad 2-input NOR gate
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT402-1
max.
1.1
A
0.15
0.05
A
1
0.95
0.80
14
A
1
2
y
IEC
Z
0.25
pin 1 index
A
e
3
D
0.30
0.19
b
p
MO-153
JEDEC
0.2
0.1
c
b
p
8
7
REFERENCES
D
5.1
4.9
0
(1)
w
M
E
4.5
4.3
(2)
JEITA
scale
2.5
0.65
12
e
c
A
H
6.6
6.2
2
E
A
1
5 mm
L
1
0.75
0.50
L
H
p
E
E
detail X
0.4
0.3
Q
L
L
PROJECTION
EUROPEAN
p
0.2
v
Q
A
(A )
0.13
3
w
X
Product specification
v
0.1
A
y
M
74LVC02A
ISSUE DATE
A
99-12-27
03-02-18
0.72
0.38
Z
(1)
SOT402-1
8
0
o
o

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