SA2400ABE NXP Semiconductors, SA2400ABE Datasheet - Page 22

• Manufacturer Part Number: SA2400ABE
• Manufacturer: NXP Semiconductors

Specifications of SA2400ABE

• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Package Type: LQFP
• Product Depth (mm): 7mm
• Product Length (mm): 7mm
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / Rohs Status: Not Compliant

Philips Semiconductors
Table 18. Address 04: Main chip operation modes, filter tuner, other controls
Table 19. Address 05: AGC adjustment settings
2002 Nov 04
Bit
Name
Default
Bit #
0–3
4
5
6
7
8
9
10
11
12
13
14
15–17
18
19
Bit
Name
Default
Bit #
0–4
5–9
10–14
15–19
20–23
Single chip transceiver for 2.45 GHz ISM band
Name
AGC_rxondel/s1
AGC_lnadel/s2
AGC_bbdel/ADCval
AGC Gmax
AGC target
Name
Chip mode
vei
veo
rxlv
digin
xo
clk
in22
Not used
I0p3
I1m
v2p5
filttune
fterr
adc
23
23
0
(0)
Rx AGC target
22
0
‘0000’
22
val(000)
21
0
21
Description
Main mode of operation. Coding according to following table:
Bit3
0
0
0
0
0
0
0
0
1
Notes on modes:
Use external vco input (vcoextin)
Make internal vco available at vco pads (vcoextout)
Rx output common mode voltage: 0–V
Use digital Tx inputs (FIRDAC)
Xtal oscillator ON
Reference clock output ON
Xtal input frequency: 0–44 MHz, 1–22 MHz
External reference current (pad idcout): 0.3 mA to ground
External reference current (pad idcout): 1.0 mA from supply
External reference voltage (pad v2p5) ON
Rx and Tx filter tuning bits:
Filter tuner error (read only): result is 1 when tuner exceeded range
‘1’: in Rx mode, the RSSI-ADC is always on. ‘0’: the RSSI-ADC is only on during AGC operation.
20
0
20
Write: (with test mode only), these bits set tuning value
Read: (in normal mode) tuner setting can be read out here
All calibration modes (*CALIB) require the crystal oscillator to be ON (bit XO = 1).
DCALIB (Tx LO leakage calibration) requires being in Tx mode for 5 s before calibration.
adc fterr
19
0
Description
Write: Programmable delay for AGC algorithm: Rx turn-on to AGCSET. In units of 182 ns (5.5 MHz)
Read: 1
Write: Programmable delay for AGC algorithm: Settling time after LNA gain switching. In units of 182 ns (5.5 MHz)
Read: 2
Write: Programmable delay for AGC algorithm: Settling time after baseband gain switching. In units of 182 ns
(5.5 MHz)
Read: Output of RSSI/Tx–peak detector ADC in 5-bit Gray code
Rx AGC gain limit (54 dB + programmed value) (valid: 54 through 85)
Adjustment value to AGC settling target, range –7 dB
Bit2
0
0
0
0
1
1
1
1
0
19
18
Rx AGC Gmax
0
79 dB – 11001
18
Bit1
0
0
1
1
0
0
1
1
0
st
nd
sample of RSSI in AGC cycle
sample of RSSI in AGC cycle
17
0
17
Filttune
Bit0
0
1
0
1
0
1
0
1
0
16
1
16
15
1
Mode
SLEEP
TX/RX
WAIT
RXMGC
FCALIB
DCALIB
FASTTXRXMGC
RESET
VCOCALIB
15
v2p5
14
0
14
DD
AGC_bbdel/ADCval
7(1.3 s) – 00111
I1m I0p3
/2, 1–1.25 V
13
13
0
22
12
12
1
11
n.u. in22
11
0
10
10
0
7 dB (sign plus three bits)
9
AGC_lnadel/sample2
clk
9
1
15(2.7 s) – 01111
8
xo
8
1
7
digin rxlv veo
7
0
6
6
0
5
5
0
4
AGC_rxondel/sample1
27(4.9 s) – 11011
vei
4
0
3
SA2400A
3
0
Chip mode
2
Product data
2
0
1
1
0
0
0
0