PCF8578T NXP Semiconductors, PCF8578T Datasheet - Page 8
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PCF8578T
Manufacturer Part Number
PCF8578T
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PCF8578T.pdf
(48 pages)
Specifications of PCF8578T
Operating Supply Voltage (typ)
3.3/5V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Package Type
VSO
Pin Count
56
Mounting
Surface Mount
Power Dissipation
400mW
Operating Supply Voltage (min)
2.5V
Operating Supply Voltage (max)
6V
Lead Free Status / Rohs Status
Not Compliant
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Philips Semiconductors
7
The PCF8578 row/column driver is designed for use in one
of three ways:
7.1
In mixed mode, the device functions as both a row and
column driver. It can be used in small stand-alone
applications, or for larger displays with up to 15 PCF8579s
(31 PCF8579s when two slave addresses are used).
See Table 1 for common display configurations.
7.2
In row mode, the device functions as a row driver with up
to 32 row outputs and provides the clock and
synchronization signals for the PCF8579. Up to 16
PCF8579s can normally be cascaded (32 when two slave
addresses are used).
Table 1 Possible displays configurations
Notes
1. Using 15 PCF8579s.
2. Using 16 PCF8579s.
2003 Apr 14
Stand alone
With PCF8579
APPLICATION
Stand-alone row/column driver for small displays
(mixed mode)
Row/column driver with cascaded PCF8579s
(mixed mode)
Row driver with cascaded PCF8579s (mixed mode).
LCD row/column driver for
dot matrix graphic displays
FUNCTIONAL DESCRIPTION
Mixed mode
Row mode
MULTIPLEX
RATE
1 : 16
1 : 24
1 : 32
1 : 16
1 : 24
1 : 32
1 : 8
1 : 8
ROWS
16
24
32
8
16
24
32
8
(1)
(1)
(1)
(1)
MIXED MODE
COLUMNS
632
624
616
608
32
24
16
8
(1)
(1)
(1)
(1)
8
Timing signals are derived from the on-chip oscillator,
whose frequency is determined by the value of the resistor
connected between OSC and V
Commands sent on the I
microcontroller set the mode (row or mixed), configuration
(multiplex rate and number of rows and columns) and
control the operation of the device. The device may have
one of two slave addresses. The only difference between
these slave addresses is the least significant bit, which is
set by the logic level applied to SA0. The PCF8578 and
PCF8579 also have subaddresses. The subaddress of the
PCF8578 is only defined in mixed mode and is fixed at 0.
The RAM may only be accessed in mixed mode and data
is loaded as described for the PCF8579.
Bias levels may be generated by an external potential
divider with appropriate decoupling capacitors. For large
displays, bias sources with high drive capability should be
used. A typical mixed mode system operating with up to
15 PCF8579s is shown in Fig.5 (a stand-alone system
would be identical but without the PCF8579s).
16
ROWS
8
24
24
4
(2)
(2)
2
ROW MODE
(2)
(2)
COLUMNS
640
640
640
640
(2)
(2)
(2)
(2)
2
C-bus from the host
small digital or
alphanumerical displays
alphanumeric displays and
dot matrix graphic displays
TYPICAL APPLICATIONS
SS
.
Product specification
PCF8578