GS8342T36AE-250 GSI TECHNOLOGY, GS8342T36AE-250 Datasheet - Page 12

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GS8342T36AE-250

Manufacturer Part Number
GS8342T36AE-250
Description
Manufacturer
GSI TECHNOLOGY
Datasheet

Specifications of GS8342T36AE-250

Density
36Mb
Access Time (max)
0.45ns
Sync/async
Synchronous
Architecture
DDR
Clock Freq (max)
250MHz
Operating Supply Voltage (typ)
1.8V
Address Bus
20b
Package Type
FBGA
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
650mA
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (max)
1.9V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
165
Word Size
36b
Number Of Words
1M
Lead Free Status / Rohs Status
Not Compliant
Common I/O SigmaCIO DDR-II B2 SRAM Truth Table
B2 Byte Write Clock Truth Table
*Assuming stable conditions, the RAM can achieve optimum impedance within 1024 cycles.
Rev: 1.05 12/2007
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Note: Q is controlled by K clocks if C clocks are not used.
Notes:
1.
2.
(t
BW
K
“1” = input “high”; “0” = input “low”; “X” = input “don’t care”; “T” = input “true”; “F” = input “false”.
If one or more BWn = 0, then BW = “T”, else BW = “F”.
n+1
T
T
F
F
K
)
n
(t
BW
K
n+2
T
F
T
F
)
LD
1
0
0
Dx stored if BWn = 0 in 2nd data transfer only
Dx stored if BWn = 0 in 1st data transfer only
Dx stored if BWn = 0 in both data transfers
R/W
X
0
1
No Dx stored in either data transfer
Current Operation
12/37
Write Abort
Write
Write
Write
K
(t
D@K
Q@K
n
A + 0
Hi-Z
C
)
or
n+1
n+1
n+1
GS8342T08/09/18/36AE-333/300/250/200/167
DQ
D@K
Q@K
A + 1
Hi-Z
C
or
n+2
n+1
n+2
(t
K
n+1
D1
D1
D
X
X
© 2006, GSI Technology
Operation
Deselect
)
Write
Read
(t
K
n+2
D2
D2
D
X
X
)

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