S29GL128N11FAI020 Spansion Inc., S29GL128N11FAI020 Datasheet - Page 56

• Manufacturer Part Number: S29GL128N11FAI020
• Manufacturer: Spansion Inc.

Specifications of S29GL128N11FAI020

• Cell Type: NOR
• Density: 128Mb
• Access Time (max): 110ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 24/23Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: Fortified BGA
• Program/erase Volt (typ): 3/11.5 to 12.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 16M/8M
• Supply Current: 90mA
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / Rohs Status: Not Compliant

9.9
9.10
56
Erase Suspend/Erase Resume Commands
Lock Register Command Set Definitions
The Erase Suspend command, B0h, allows the system to interrupt a sector erase operation and then read
data from, or program data to, any sector not selected for erasure. This command is valid only during the
sector erase operation, including the 50 µs time-out period during the sector erase command sequence. The
Erase Suspend command is ignored if written during the chip erase operation or Embedded Program
algorithm.
When the Erase Suspend command is written during the sector erase operation, the device requires a typical
of 5 μs (maximum of 20 μs) to suspend the erase operation. However, when the Erase Suspend command is
written during the sector erase time-out, the device immediately terminates the time-out period and suspends
the erase operation.
After the erase operation is suspended, the device enters the erase-suspend-read mode. The system can
read data from or program data to any sector not selected for erasure. (The device erase suspends all
sectors selected for erasure.) Reading at any address within erase-suspended sectors produces status
information on DQ7–DQ0. The system can use DQ7, or DQ6 and DQ2 together, to determine if a sector is
actively erasing or is erase-suspended. Refer to the Write Operation Status section for information on these
status bits.
After an erase-suspended program operation is complete, the device returns to the erase-suspend-read
mode. The system can determine the status of the program operation using the DQ7 or DQ6 status bits, just
as in the standard word program operation. Refer to
In the erase-suspend-read mode, the system can also issue the autoselect command sequence. Refer to the
Autoselect Mode on page 38
To resume the sector erase operation, the system must write the Erase Resume command. The address of
the erase-suspended sector is required when writing this command. Further writes of the Resume command
are ignored. Another Erase Suspend command can be written after the chip has resumed erasing. It is
important to allow an interval of at least 5 ms between Erase Resume and Erase Suspend.
The Lock Register Command Set permits the user to one-time program the Secured Silicon Sector Protection
Bit, Persistent Protection Mode Lock Bit, and Password Protection Mode Lock Bit. The Lock Register bits are
all readable after an initial access delay.
The Lock Register Command Set Entry command sequence must be issued prior to any of the following
commands listed, to enable proper command execution.
Note that issuing the Lock Register Command Set Entry command disables reads and writes for the
flash memory.
The Lock Register Command Set Exit command must be issued after the execution of the commands to
reset the device to read mode. Otherwise the device hangs. If this happens, the flash device must be reset.
Please refer to RESET# for more information. It is important to note that the device is in either Persistent
Protection mode or Password Protection mode depending on the mode selected prior to the device hang.
For either the Secured Silicon Sector to be locked, or the device to be permanently set to the Persistent
Protection Mode or the Password Protection Mode, the associated Lock Register bits must be programmed.
Note that only the Persistent Protection Mode Lock Bit or the Password Protection Mode Lock Bit can be
programmed. The Lock Register Program operation aborts if there is an attempt to program both the
Persistent Protection Mode and the Password Protection Mode Lock bits.
The Lock Register Command Set Exit command must be initiated to re-enable reads and writes to the main
memory.
Lock Register Program Command
Lock Register Read Command
section and
S29GL-N
Autoselect Command Sequence on page 49
D a t a
Write Operation Status on page 64
S h e e t
S29GL-N_00_B8 May 30, 2008
for details.
for more information.