S29GL064A90TFIR4 Spansion Inc., S29GL064A90TFIR4 Datasheet - Page 58

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S29GL064A90TFIR4

Manufacturer Part Number
S29GL064A90TFIR4
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of S29GL064A90TFIR4

Cell Type
NOR
Density
64Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
23/22Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
8M/4M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Compliant

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9.6
58
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writing two unlock
cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the chip erase
command, which in turn invokes the Embedded Erase algorithm. The device does not require the system to
preprogram prior to erase. The Embedded Erase algorithm automatically preprograms and verifies the entire
memory for an all zero data pattern prior to electrical erase. The system is not required to provide any
controls or timings during these operations.
address and data requirements for the chip erase command sequence.
When the Embedded Erase algorithm is complete, the device returns to the read mode and addresses are no
longer latched. The system can determine the status of the erase operation by using DQ7, DQ6, or DQ2.
Refer to
Any commands written during the chip erase operation are ignored. However, note that a hardware reset
immediately terminates the erase operation. If this occurs, the chip erase command sequence should be
reinitiated once the device returns to reading array data, to ensure data integrity.
Figure 10.1 on page 59
parameters, and
Write Operation Status on page 63
Figure 16.7 on page 80
illustrates the algorithm for the erase operation. Refer to
No
Figure 9.3 Program Suspend/Program Resume
Sequence in Progress
Program Operation
Write address/data
Write address/data
Program Suspend
or Write-to-Buffer
operation prior to
Device reverts to
Read data as
Wait 15 μs
XXXh/B0h
XXXh/30h
reading?
required
Done
S29GL-A
for timing diagrams.
Yes
Table 10.2 on page 61
for information on these status bits.
D a t a
Write Program Suspend
Command Sequence
Command is also valid for
Erase-suspended-program
operations
Autoselect and SecSi Sector
read operations are also allowed
Data cannot be read from erase- or
program-suspended sectors
Write Program Resume
Command Sequence
S h e e t
and
Table 10.1 on page 62
S29GL-A_00_A12 May 21, 2008
Table 16.5 on page 76
show the
for

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