TE28F160B3TA110 Intel, TE28F160B3TA110 Datasheet - Page 10

• Manufacturer Part Number: TE28F160B3TA110
• Manufacturer: Intel

Specifications of TE28F160B3TA110

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 110ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 20b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 1M
• Supply Current: 18mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
3.1
3.2
3.2.1
10
Figure 1. B3 Architecture Block Diagram
Architecture Diagram
Memory Maps and Block Organization
The B3 flash memory device is an asymmetrically blocked architecture that enables system
integration of code and data within a single flash device. Each block can be erased independently
of the others up to 100,000 times. For the address locations of each block, see the following
memory maps:
Parameter Blocks
The B3 flash memory device architecture includes parameter blocks to facilitate storage of
frequently updated small parameters (i.e., data that would normally be stored in an EEPROM). The
word-rewrite functionality of EEPROMs can be emulated using software techniques. Each device
contains eight parameter blocks of 8 Kbytes/4 Kwords (8192 bytes/4,096 words) each.
A
•
•
•
•
•
0
-A
19
Table 2, “16- and 32-Mbit Word-Wide Memory Addressing Map” on page 11
Table 3, “4- and 8-Mbit Word-Wide Memory Addressing Map” on page 14
Table 4, “16-, 32-, and 64-Mbit Word-Wide Memory Addressing Map” on page 15
Table 5, “8- and 16-Mbit Byte-Wide Memory Addressing Map” on page 20
Table 6, “4-Mbit Byte Wide Memory Addressing Map” on page 23
V
Input Buffer
CCQ
Address
Address
Counter
Latch
Y-Decoder
X-Decoder
Reduction
Control
Power
Output Buffer
Y-Gating/Sensing
Comparator
DQ
Identifier
Register
Register
Status
Data
0
-DQ
15
Command
Input Buffer
Write State
Interface
Machine
User
I/O Logic
Program/Erase
Voltage Switch
Datasheet
WE#
OE#
WP#
CE#
RP#
GND
V
CC
V
PP