XPC850ZT50B Freescale Semiconductor, XPC850ZT50B Datasheet - Page 31

XPC850ZT50B

Manufacturer Part Number
XPC850ZT50B
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XPC850ZT50B

Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Operating Temp Range
0C to 95C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
BGA
Lead Free Status / Rohs Status
Not Compliant

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Figure 6-18 provides the timing for the asynchronous negated UPWAIT signal controlled
by the UPM.
Figure 6-19 provides the timing for the synchronous external master access controlled by
the GPCM.
MOTOROLA
Figure 6-17. Asynchronous UPWAIT Asserted Detection in UPM Handled Cycles
Figure 6-18. Asynchronous UPWAIT Negated Detection in UPM Handled Cycles
Freescale Semiconductor, Inc.
MPC850 (Rev. A/B/C) Hardware Specifications
For More Information On This Product,
Go to: www.freescale.com
Timing
Timing
Layout Practices
31

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