JS28F128P30T85 Micron Technology Inc, JS28F128P30T85 Datasheet - Page 36

• Manufacturer Part Number: JS28F128P30T85
• Manufacturer: Micron Technology Inc

Specifications of JS28F128P30T85

• Cell Type: NOR
• Density: 128Mb
• Access Time (max): 85/17ns
• Interface Type: Parallel/Serial
• Boot Type: Top
• Address Bus: 23b
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 1.7 to 2/8.5 to 9.5V
• Sync/async: Async/Sync
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 2V
• Word Size: 16b
• Number Of Words: 8M
• Supply Current: 28mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Compliant

9.3
9.4
Datasheet
36
during Erase Suspend. Additionally, Clear Status Register, Program, Program Suspend,
Block Lock, Block Unlock, and Block Lock-Down are valid commands during Erase
Suspend.
During an erase suspend, deasserting CE# places the device in standby, reducing
active current. V
while in erase suspend. If RST# is asserted, the device is reset.
Erase Resume
The Erase Resume command instructs the device to continue erasing, and
automatically clears status register bits SR[7,6]. This command can be written to any
address. If status register error bits are set, the Status Register should be cleared
before issuing the next instruction. RST# must remain deasserted (see
“Program Suspend/Resume Flowchart” on page
Erase Protection
When V
V
PP
is below V
PP
= V
IL
PPLK
, absolute hardware erase protection is provided for all device blocks. If
PP
, erase operations halt and SR[3] is set indicating a V
must remain at a valid level, and WP# must remain unchanged
81).
PP
Figure 35,
-level error.
August 2008
306666-12
P30