CY7C09179V-7AC Cypress Semiconductor Corp, CY7C09179V-7AC Datasheet - Page 10

• Manufacturer Part Number: CY7C09179V-7AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C09179V-7AC

• Density: 288Kb
• Access Time (max): 18ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 45MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 15b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 275mA
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 9b
• Number Of Words: 32K
• Lead Free Status / Rohs Status: Not Compliant

Switching Waveforms
Notes
Document #: 38-06043 Rev. *C
20. In this depth expansion example, B1 represents Bank #1 and B2 is Bank #2; Each Bank consists of one Cypress dual-port device from this datasheet. ADDRESS
21. OE and ADS = V
22. The same waveforms apply for a right port write to flow-through left port read.
23. CE
24. OE = V
25. It t
ADDRESS
ADDRESS
DATA
= ADDRESS
until t
CCS
DATA
0
and ADS = V
CCS
CLK
R/W
CLK
R/W
≤ maximum specified, then data from right port READ is not valid until the maximum specified for t
OUTR
IL
for the right port, which is being read from. OE = V
INL
+ t
R
R
R
L
L
L
CD1
(B2)
. t
.
IL
IL
CWDD
; CE
; CE
1(B1)
1
t
t
t
does not apply in this case.
SW
SD
, CNTEN, and CNTRST = V
SA
, CE
Figure 9. Left Port Write to Flow-Through Right Port Read
MATCH
1(B2)
VALID
t
t
t
SW
SA
, R/W, CNTEN, and CNTRST = V
MATCH
(continued)
CCS
t
DC
t
t
t
HW
HA
t
t
HW
HA
HD
t
IH
CWDD
.
t
CD1
IH
for the left port, which is being written to.
IH
.
MATCH
VALID
NO
MATCH
NO
t
DC
CWDD
. If t
[22, 23, 24, 25]
CCS
t
CD1
>maximum specified, then data is not valid
CY7C09079V/89V/99V
CY7C09179V/89V/99V
VALID
Page 10 of 21
(B1)
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