AM29F016-90EC AMD (ADVANCED MICRO DEVICES), AM29F016-90EC Datasheet - Page 8

• Manufacturer Part Number: AM29F016-90EC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29F016-90EC

• Lead Free Status / Rohs Status: Not Compliant

Legend:
L = logic 0, H = logic 1, X = Don’t Care. See DC Characteristics for voltage levels.
Notes:
1. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to Table 5.
2. Refer to the section on Sector Group Protection.
Read Mode
The Am29F016 has two control functions which must
be satisfied in order to obtain data at the outputs. CE is
the power control and should be used for device selec-
tion. OE is the output control and should be used to
gate data to the output pins if the device is selected.
Address access time (t
stable addresses to valid output data. The chip
enable access time (t
addresses and stable CE to valid data at the output
pins. The output enable access time is the delay from
the falling edge of OE to valid data at the output pins
(assuming the addresses have been stable for at
least t
Standby Mode
There are two ways to implement the standby mode on
the Am29F016 device, one using both the CE and
RESET pins; the other via the RESET pin only.
When using both pins, a CMOS standby mode is
achieved with CE and RESET inputs both held at V
8
Autoselect, AMD Manuf. Code (1)
Autoselect Device Code (1)
Read
Standby
Output Disable
Write
Enable Sector Group Protect (2)
Verify Sector Group Protect (2)
Temporary Sector Group Unprotect
Hardware Reset/Standby
0.3 V. Under this condition the current is typically
ACC
–t
OE
Operation
time).
ACC
CE
) is the delay from stable
) is equal to the delay from
Table 1. Am29F016 User Bus Operations
CE
H
X
X
L
L
L
L
L
L
L
OE
V
H
H
X
X
X
L
L
L
L
ID
Am29F016
CC
WE
H
H
X
X
H
H
X
X
L
L
reduced to less than 1 A. A TTL standby mode is
achieved with CE and RESET pins held at V
this condition the current is typically reduced to 200 A.
The device can be read with standard access time (t
from either of these standby modes .
When using the RESET pin only, a CMOS standby
mode is achieved with RESET input held at V
(CE = don’t care). Under this condition the current is typ-
ically reduced to less than 1 A. A TTL standby mode is
achieved with RESET pin held at V
Under this condition the current is typically reduced to
less than 200 A. Once the RESET pin is taken high,
the device requires 50 ns of wake up time before out-
puts are valid for read access.
In the standby mode the outputs are in the high imped-
ance state, independent of the OE input.
Output Disable
With the OE input at a logic high level (V
the device is disabled. This will cause the output pins to
be in a high impedance state.
A0
A0
A0
H
X
X
X
X
X
L
L
A1
A1
A1
X
X
X
H
X
X
L
L
A6
A6
A6
L
L
X
X
X
L
X
X
V
V
V
V
A9
A9
A9
X
X
X
X
ID
ID
ID
ID
DQ0
HIGH Z
HIGH Z
HIGH Z
Code
Code
D
Code
D
OUT
–
X
X
IN
IL
DQ7
(CE = don’t care).
IH
), output from
SS
RESET
IH
V
. Under
H
H
H
H
H
H
H
H
L
ID
0.3 V
CE
)