AM29F016-90EC AMD (ADVANCED MICRO DEVICES), AM29F016-90EC Datasheet - Page 12

• Manufacturer Part Number: AM29F016-90EC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29F016-90EC

• Lead Free Status / Rohs Status: Not Compliant

Notes:
1. Bus operations are defined in Table 1.
2. RA = Address of the memory location to be read.
3. RD = Data read from location RA during read operation.
4. Read and Byte program functions to non-erasing sectors are allowed in the Erase Suspend mode.
5. Address bits A15, A14, A13, A12 and A11 = X, X = don’t care.
Read/Reset Command
The read or reset operation is initiated by writing the
read/reset command sequence into the command reg-
ister. Microprocessor read cycles retrieve array data
from the memory. The device remains enabled for
reads until the command register contents are altered.
The device will automatically power-up in the read/
reset state. In this case, a command sequence is not
required to read data. Standard microprocessor read
cycles will retrieve array data. This default value en-
sures that no spurious alteration of the memory content
occurs during the power transition. Refer to the AC
Read Characteristics and Waveforms for the specific
timing parameters.
Autoselect Command
Flash memories are intended for use in applications
where the local CPU can alter memory contents. As
such, manufacture and device codes must be
accessible while the device resides in the target sys-
tem. PROM programmers typically access the signa-
ture codes by raising A9 to a high voltage. However,
multiplexing high voltage onto the address lines is not
generally a desirable system design practice.
The device contains an autoselect command operation
to supplement traditional PROM programming
12
Reset/Read
Reset/Read
Autoselect
Byte Program
Chip Erase
Sector Erase
Erase Suspend
Erase Resume
Read/Reset
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of the WE pulse.
SA= Address of the sector to be erased. The combination of A20, A19, A18, A17, and A16 will uniquely select any sector.
PD = Data to be programmed at location PA. Data is latched on the rising edge of WE .
Command
Sequence
Cycles
Req’d
Write
Bus
1
3
3
4
6
6
1
1
XXXXH
XXXXH
XXXXH
5555H
5555H
5555H
5555H
5555H
Addr
Write Cycle
First Bus
Table 5. Am29F016 Command Definitions
Data
AAH
AAH
AAH
AAH
AAH
F0H
B0H
30H
2AAAH
2AAAH
2AAAH
2AAAH
2AAAH
Addr
Second Bus
Write Cycle
Data
55H
55H
55H
55H
55H
Am29F016
5555H
5555H
5555H
5555H
5555H
Addr
Write Cycle
Third Bus
methodology. The operation is initiated by writing the
autoselect command sequence into the command reg-
ister. Following the command write, a read cycle from
address XX00H retrieves the manufacturer code of
01H. A read cycle from address XX01H returns the de-
vice code ADH (see Table 2).
All manufacturer and device codes will exhibit odd par-
ity with DQ7 defined as the parity bit.
Furthermore, the write protect status of sectors can be
read in this mode. Scanning the sector group
addresses (A18, A19, and A20) while (A6, A1, A0) = (0,
1, 0) will produce a logical “1” at device output DQ0 for
a protected sector group.
To terminate the operation, it is necessary to write the
read/reset command sequence into the register.
Byte Programming
The device is programmed on a byte-by-byte basis.
Programming is a four bus cycle operation. There are
two “unlock” write cycles. These are followed by the
program set-up command and data write cycles. Ad-
dresses are latched on the falling edge of CE or WE,
whichever happens later and the data is latched on the
rising edge of CE or WE, whichever happens first. The
rising edge of CE or WE (whichever happens first) be-
gins programming using the Embedded Program Algo-
Data
F0H
A0H
90H
80H
80H
5555H
5555H
Addr
Fourth Bus
Read/Write
RA
PA
Cycle
Data
Data
AAH 2AAAH 55H 5555H
AAH 2AAAH 55H
RD
Write Cycle
Addr
Fifth Bus
Data
Addr
Write Cycle
Sixth Bus
SA
Data
10H
30H