AM29F016-90EC AMD (ADVANCED MICRO DEVICES), AM29F016-90EC Datasheet - Page 15

• Manufacturer Part Number: AM29F016-90EC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29F016-90EC

• Lead Free Status / Rohs Status: Not Compliant

Write Operation Status
Notes:
1. Performing successive read operations from the erase-suspended sector will cause DQ2 to toggle.
2. Performing successive read operations from any address will cause DQ6 to toggle.
3. Reading the byte address being programmed while in the erase-suspend program mode will indicate logic ‘1’ at the DQ2 bit.
DQ7
Data Polling
The Am29F016 device features Data Polling as a
method to indicate to the host that the embedded
algorithms are in progress or completed. During the
Embedded Program Algorithm, an attempt to read the
device will produce the complement of the data last
written to DQ7. Upon completion of the Embedded
Program Algorithm, an attempt to read the device will
produce the true data last written to DQ7. During the
Embedded Erase Algorithm, an attempt to read the
device will produce a “0” at the DQ7 output. Upon
completion of the Embedded Erase Algorithm an at-
tempt to read the device will produce a “1” at the DQ7
output. The flowchart for Data Polling (DQ7) is shown
in Figure 3.
Data Polling will also flag the entry into Erase Suspend.
DQ7 will switch “0” to “1” at the start of the Erase Sus-
pend mode. Please note that the address of an erasing
sector must be applied in order to observe DQ7 in the
Erase Suspend Mode.
During Program in Erase Suspend, Data Polling will
perform the same as in regular program execution out-
side of the suspend mode.
For chip erase, the Data Polling is valid after the rising
edge of the sixth WE pulse in the six write pulse
In Progress
Time Limits
Exceeded
However, successive reads from the erase-suspended sector will cause DQ2 to toggle.
Byte Program in Embedded Program Algorithm
Embedded Program Algorithm
Erase Suspended
Mode
Byte Program in Embedded Program Algorithm
Program/Erase Program in Embedded Program Algorithm
Erase Suspended
Mode
Erase Suspended Read
(Erase Suspended Sector)
Erase Suspended Read
(Non-Erase Suspended Sector)
Erase Suspended Read
(Non-Erase Suspended Sector)
Erase Suspended Read
(non-Erase Suspended Sector)
Status
Table 6. Write Operation Status
Am29F016
sequence. For sector erase, the Data Polling is valid
after the last rising edge of the sector erase WE pulse.
Data Polling must be performed at sector addresses
within any of the sectors being erased and not a sector
that is within a protected sector group. Otherwise, the
status may not be valid.
Just prior to the completion of Embedded Algorithm op-
erations DQ7 may change asynchronously while the
output enable (OE) is asserted low. This means that
the device is driving status information on DQ7 at one
instant of time and then that byte’s valid data at the next
instant of time. Depending on when the system sam-
ples the DQ7 output, it may read the status or valid
data. Even if the device has completed the Embedded
Algorithm operations and DQ7 has a valid data, the
data outputs on DQ0–DQ6 may be still invalid. The
valid data on DQ0–DQ7 can be read on the successive
read attempts.
The Data Polling feature is only active during the Em-
bedded Programming Algorithm, Embedded Erase Al-
gorithm, Erase Suspend, erase-suspend-program
mode, or sector erase time-out (see Table 6).
See Figure 11 for the Data Polling timing specifications
and diagrams.
DQ7
Data
DQ7
DQ7
DQ7
DQ7
1
0
0
(Note 2)
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
DQ6
Data
1
DQ5
Data
0
0
0
0
1
1
1
DQ3
Data
0
1
1
1
0
1
1
(Note 1)
(Note 3)
Toggle
Toggle
Data
DQ2
N/A
N/A
1
1
1
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