TE28F800F3B95 Intel, TE28F800F3B95 Datasheet - Page 19

• Manufacturer Part Number: TE28F800F3B95
• Manufacturer: Intel

Specifications of TE28F800F3B95

• Cell Type: NOR
• Density: 8Mb
• Access Time (max): 95ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 19b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Async/Sync
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 512K
• Supply Current: 60mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Not Compliant

4.7
4.8
PRELIMINARY
Block Erase Suspend/Resume Command
The Block Erase Suspend command allows block erase interruption to read or program data in
another block. Once the block erase process starts, writing the Block Erase Suspend command
requests that the WSM suspend the block erase operation after a certain latency period. The device
continues to output status register data when read after the Block Erase Suspend command is
issued. Status Register bits SR.7 and SR.6 indicate when the block erase operation has been
suspended (both will be set to “1”). Specification
At this point, a Read Array command can be written to read data from blocks other than that which
is suspended. A Program command sequence can also be issued during erase suspend to program
data in other blocks. Using the Program Suspend command (see
can be suspended during an erase suspend. The only other valid commands while block erase is
suspended are Read Status Register and Block Erase Resume.
During a block erase suspend, the chip can go into a pseudo-standby mode by taking CE# to V
which reduces active current draw. V
WP# must also remain at V
To resume the block erase operation, write the Block Erase Resume command to the CUI. This will
automatically clear status register bits SR.6 and SR.7. After the Erase Resume command is written,
the device automatically outputs status register data when read (see
Suspend/Resume Flowchart” on page
initiated during block erase suspend have completed.
Program Suspend/Resume Command
The Program Suspend command allows program interruption to read data in other flash memory
locations. Once the program process starts, writing the Program Suspend command requests that
the WSM suspend the program operation after a certain latency period. The device continues to
output status register data when read after issuing the Program Suspend command. Status register
bits SR.7 and SR.2 indicate when the Program operation has been suspended (both will be set to
“1”). Specification t
At this point, a Read Array command can be written to read data from blocks other than that which
is suspended. The only other valid commands while Program is suspended are Read Status Register
and Program Resume.
During a program suspend, the chip can go into a pseudo-standby mode by taking CE# to V
which reduces active current draw. V
must also remain at V
To resume the program, write the Program Resume command to the CUI. This will automatically
clear status register bits SR.7 and SR.2. After the Program Resume command is written, the device
automatically outputs status register data when read (see
Flowchart” on page
WHRH1
23).
IL
or V
IL
defines the program suspend latency.
IH
or V
.
IH
.
PP
PP
22). Block erase cannot resume until program operations
must remain at V
must remain at V
t
WHRH2
Figure 10, “Program Suspend/Resume
PP1/2
PP1/2
defines the block erase suspend latency.
while program is suspended. WP#
while block erase is suspended.
Section
Figure 9, “Block Erase
28F800F3—Automotive
4.8), a program operation
IH
,
IH
13
,