LH28F160BJHE-TTLZE Sharp Electronics, LH28F160BJHE-TTLZE Datasheet - Page 19
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LH28F160BJHE-TTLZE
Manufacturer Part Number
LH28F160BJHE-TTLZE
Description
Manufacturer
Sharp Electronics
Datasheet
1.LH28F160BJHE-TTLZE.pdf
(44 pages)
Specifications of LH28F160BJHE-TTLZE
Cell Type
NOR
Density
16Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Top
Address Bus
20b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
1M
Supply Current
30mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LH28F160BJHE-TTLZE
Manufacturer:
SHARP
Quantity:
100
SR.7 = WRITE STATE MACHINE STATUS (WSMS)
SR.6 = BLOCK ERASE SUSPEND STATUS (BESS)
SR.5 = ERASE AND CLEAR BLOCK LOCK-BITS
SR.4 = WORD WRITE AND SET LOCK-BIT STATUS
SR.3 = V
SR.2 = WORD WRITE SUSPEND STATUS (WWSS)
SR.1 = DEVICE PROTECT STATUS (DPS)
SR.0 = RESERVED FOR FUTURE ENHANCEMENTS (R)
WSMS
1 = Ready
0 = Busy
1 = Block Erase Suspended
0 = Block Erase in Progress/Completed
1 = Error in Block Erase, Full Chip Erase or Clear Block
0 = Successful Block Erase, Full Chip Erase or Clear
1 = Error in Word Write or Set Block/Permanent Lock-
0 = Successful Word Write or Set Block/Permanent Lock-
1 = V
0 = V
1 = Word Write Suspended
0 = Word Write in Progress/Completed
1 = Block Lock-Bit, Permanent Lock-Bit and/or WP#
0 = Unlock
7
STATUS (ECBLBS)
Lock-Bits
Block Lock-Bits
(WWSLBS)
Bit
Bit
Lock Detected, Operation Abort
CCW
CCW
CCW
Low Detect, Operation Abort
OK
STATUS (VCCWS)
BESS
6
ECBLBS
5
Table 6. Status Register Definition
WWSLBS
4
Check SR.7 to determine block erase, full chip erase, word
write or lock-bit configuration completion. SR.6-0 are
invalid while SR.7="0".
If both SR.5 and SR.4 are "1"s after a block erase, full chip
erase or lock-bit configuration attempt, an improper
command sequence was entered.
SR.3 does not provide a continuous indication of V
level. The WSM interrogates and indicates the V
only after Block Erase, Full Chip Erase, Word Write or
Lock-Bit Configuration command sequences. SR.3 is not
guaranteed to reports accurate feedback only when
V
SR.1 does not provide a continuous indication of permanent
and block lock-bit and WP# values. The WSM interrogates
the permanent lock-bit, block lock-bit and WP# only after
Block Erase, Full Chip Erase, Word Write or Lock-Bit
Configuration command sequences. It informs the system,
depending on the attempted operation, if the block lock-bit is
set, permanent lock-bit is set and/or WP# is V
the block lock and permanent lock configuration codes after
writing the Read Identifier Codes command indicates
permanent and block lock-bit status.
SR.0 is reserved for future use and should be masked out
when polling the status register.
CCW
VCCWS
3
V
CCWH1/2
.
WWSS
2
NOTES:
DPS
1
IL
. Reading
CCW
CCW
Rev. 1.27
R
0
level