LH28F008SAN-85 Sharp Electronics, LH28F008SAN-85 Datasheet - Page 18
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LH28F008SAN-85
Manufacturer Part Number
LH28F008SAN-85
Description
Manufacturer
Sharp Electronics
Datasheet
1.LH28F008SAN-85.pdf
(47 pages)
Specifications of LH28F008SAN-85
Cell Type
NOR
Density
8Mb
Access Time (max)
85ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
20b
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
SOP
Program/erase Volt (typ)
11.4 to 12.6V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
1M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
44
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LH28F008SAN-85
Manufacturer:
SHARP
Quantity:
5 380
Company:
Part Number:
LH28F008SAN-85
Manufacturer:
SHARP
Quantity:
5 704
sharp
FULL STATUS CHECK PROCEDURE
Status Register Data
Read (See Above)
Check if Desired
Block Address
Block Address
Block Erase
Block Erase
Completed
Successful
Write D0H
Write 20H,
Full Status
SR.4,5=1
Ready?
SR.3=0
SR.5=0
WSM
Start
?
?
?
YES
YES
NO
YES
NO
YES
NO
NO
NO
Suspend
Command Sequence
Erase?
Block Erase
V
PP
Error
Error
Error
Range
Figure 6. Automated Block Erase Flowchart
Erase Suspend
YES
Loop
LHF08SZM
Standby/Read
Repeat for subsequent bytes
Full status check can be done after each block or after a
sequence of blocks
Write FFH after the last block erase operation to reset the
device to Read Array Mode
SR.3 MUST be cleared, if set during a block erase attempt,
before further attempts are allowed by the Write State
Machine.
SR.5 is only cleared by the Clear Status Register Command,
in cases where multiple blocks are erased before full status is
checked.
If error is detected, clear the Status Register before
attempting retry or other error recovery.
Operation
Optional
Operation
Standby
Standby
Standby
Read
Bus
Write
Write
Bus
Command
Command
Erase
Setup
Erase
CPU may already have read
Status Register data in WSM
Ready polling above
Check SR.3
1=V
Check SR.4,5
Both 1=Command Sequence
Error
Check SR.5
1=Block Erase Error
Data=20H
Address=Within block to be
erased
Data=D0H
Address=Within block to be
erased
Check RY/BY#
V
Read Status Register
Check SR.7
1=Ready, 0=Busy
Toggle OE# or CE# to
update Status Register
OH
PP
=Ready, V
Low Detect
Comments
Comments
or
OL
=Busy
15