AM29LV640MB90REI Spansion Inc., AM29LV640MB90REI Datasheet - Page 41

no-image

AM29LV640MB90REI

Manufacturer Part Number
AM29LV640MB90REI
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29LV640MB90REI

Cell Type
NOR
Density
64Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
23/22Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
3 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
8M/4M
Supply Current
20mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AM29LV640MB90REI
Manufacturer:
AMD
Quantity:
20 000
Part Number:
AM29LV640MB90REIT
Manufacturer:
AMD
Quantity:
1 000
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin
which indicates whether an Embedded Algorithm is in
progress or complete. The RY/BY# status is valid after
the rising edge of the final WE# pulse in the command
sequence. Since RY/BY# is an open-drain output, sev-
eral RY/BY# pins can be tied together in parallel with a
pull-up resistor to V
If the output is low (Busy), the device is actively eras-
ing or programming. (This includes programming in
the Erase Suspend mode.) If the output is high
(Ready), the device is in the read mode, the standby
mode, or in the erase-suspend-read mode.
shows the outputs for RY/BY#.
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded
Program or Erase algorithm is in progress or com-
plete, or whether the device has entered the Erase
Suspend mode. Toggle Bit I can be read at any ad-
dress, and is valid after the rising edge of the final
WE# pulse in the command sequence (prior to the
program or erase operation), and during the sector
erase time-out.
During an Embedded Program or Erase algorithm op-
eration, successive read cycles to any address cause
DQ6 to toggle. The system can use either OE# or CE#
to control the read cycles. When the operation is com-
plete, DQ6 stops toggling.
February 1, 2007 26190C8
CC
.
D A T A
Table 14
Am29LV640MT/B
S H E E T
After an erase command sequence is written, if all sectors
selected for erasing are protected, DQ6 toggles for approxi-
mately 100 µs, then returns to reading array data. If not all
selected sectors are protected, the Embedded Erase algo-
rithm erases the unprotected sectors, and ignores the se-
lected sectors that are protected.
The system can use DQ6 and DQ2 together to determine
whether a sector is actively erasing or is erase-suspended.
When the device is actively erasing (that is, the Embedded
Erase algorithm is in progress), DQ6 toggles. When the de-
vice enters the Erase Suspend mode, DQ6 stops toggling.
However, the system must also use DQ2 to determine
which sectors are erasing or erase-suspended. Alterna-
tively, the system can use DQ7. See
page
If a program address falls within a protected sector,
DQ6 toggles for approximately 1 μs after the program
command sequence is written, then returns to reading
array data.
DQ6 also toggles during the erase-suspend-program
mode, and stops toggling once the Embedded Pro-
gram algorithm is complete.
Table 14
Figure 9
AC Characteristics
grams.
and DQ6 in graphical form. See also
on page
38).
Figure 22
40.
shows the toggle bit algorithm.
shows the outputs for Toggle Bit I on DQ6.
shows the differences between DQ2
shows the toggle bit timing dia-
DQ7: Data# Polling on
DQ2: Toggle Bit II
Figure 21
39
in

Related parts for AM29LV640MB90REI