AM29LV640MB90REI Spansion Inc., AM29LV640MB90REI Datasheet - Page 26

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AM29LV640MB90REI

Manufacturer Part Number
AM29LV640MB90REI
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29LV640MB90REI

Cell Type
NOR
Density
64Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
23/22Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
3 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
8M/4M
Supply Current
20mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant

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Part Number
Manufacturer
Quantity
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Part Number:
AM29LV640MB90REI
Manufacturer:
AMD
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Part Number:
AM29LV640MB90REIT
Manufacturer:
AMD
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Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to Tables
for command definitions). In addition, the following
COMMON FLASH MEMORY INTERFACE (CFI)
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
handshake, which allows specific vendor-specified
software algorithms to be used for entire families of
devices. Software support can then be device-inde-
pendent, JEDEC ID-independent, and forward- and
backward-compatible for the specified flash device
families. Flash vendors can standardize their existing
interfaces for long-term compatibility.
This device enters the CFI Query mode when the sys-
tem writes the CFI Query command, 98h, to address
55h, any time the device is ready to read array data.
The system can read CFI information at the addresses
given in Tables 8–11. To terminate reading CFI data,
the system must write the reset command.
24
Figure 3. Secured Silicon Sector Protect Verify
Write 40h to SecSi
Read from SecSi
Sector address
A1 = 1, A0 = 0
A1 = 1, A0 = 0
Sector address
Write 60h to
with A6 = 0,
with A6 = 0,
any address
RESET# =
Wait 1 ms
V
IH
START
or V
ID
Remove V
If data = 00h,
SecSi Sector is
If data = 01h,
SecSi Sector is
from RESET#
Protect Verify
unprotected.
SecSi Sector
Write reset
protected.
command
complete
IH
or V
12
D A T A
ID
and
Am29LV640MT/B
13
S H E E T
hardware data protection measures prevent accidental
erasure or programming, which might otherwise be
caused by spurious system level signals during V
power-up and power-down transitions, or from system
noise.
Low V
When V
cept any write cycles. This protects data during V
power-up and power-down. The command register
and all internal program/erase circuits are disabled,
and the device resets to the read mode. Subsequent
writes are ignored until V
system must provide the proper signals to the control
pins to prevent unintentional writes when V
greater than V
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE#
or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
CE# and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE# = V
the device does not accept commands on the rising
edge of WE#. The internal state machine is automati-
cally reset to the read mode on power-up.
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
CFI data at the addresses given in Tables 8–11. The
system must write the reset command to return the
device to reading array data.
For further information, please refer to the CFI Specifi-
cation and CFI Publication 100, available via the World
Wide Web at http://www.amd.com/flash/cfi. Alterna-
tively, contact an AMD representative for copies of
these documents.
IL
, CE# = V
CC
CC
Write Inhibit
is less than V
IH
LKO
or WE# = V
.
IL
and OE# = V
LKO
CC
IH
, the device does not ac-
is greater than V
. To initiate a write cycle,
26190C8 February 1, 2007
IH
during power up,
LKO
. The
CC
CC
CC
is

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