SAK-C167CS-L33M Infineon Technologies, SAK-C167CS-L33M Datasheet - Page 5

• Manufacturer Part Number: SAK-C167CS-L33M
• Manufacturer: Infineon Technologies

Specifications of SAK-C167CS-L33M

• Cpu Family: C166
• Device Core Size: 16b
• Frequency (max): 33MHz
• Interface Type: CAN/SPI/USART
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 11KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 24-chx10-bit
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: MQFP
• Lead Free Status / Rohs Status: Supplier Unconfirmed

16-Bit Single-Chip Microcontroller
C166 Family
C167CS-4R, C167CS-L
• High Performance 16-bit CPU with 4-Stage Pipeline
• 16-Priority-Level Interrupt System with 56 Sources, Sample-Rate down to 40/30/25 ns
• 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
• Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5),
• On-Chip Memory Modules
• On-Chip Peripheral Modules
• Up to 16 MBytes External Address Space for Code and Data
• Idle, Sleep, and Power Down Modes with Flexible Power Management
• Programmable Watchdog Timer and Oscillator Watchdog
• Up to 111 General Purpose I/O Lines,
Data Sheet
– 80/60/50 ns Instruction Cycle Time at 25/33/40 MHz CPU Clock
– 400/303/250 ns Multiplication (16 × 16 bit), 800/606/500 ns Division (32-/16-bit)
– Enhanced Boolean Bit Manipulation Facilities
– Additional Instructions to Support HLL and Operating Systems
– Register-Based Design with Multiple Variable Register Banks
– Single-Cycle Context Switching Support
– 16 MBytes Total Linear Address Space for Code and Data
– 1024 Bytes On-Chip Special Function Register Area
Peripheral Event Controller (PEC)
via prescaler or via direct clock input
– 3 KBytes On-Chip Internal RAM (IRAM)
– 8 KBytes On-Chip Extension RAM (XRAM)
– 32 KBytes On-Chip Program Mask ROM
– 24-Channel 10-bit A/D Converter with Programmable Conversion Time
– Two 16-Channel Capture/Compare Units
– 4-Channel PWM Unit
– Two Multi-Functional General Purpose Timer Units with 5 Timers
– Two Serial Channels (Synchronous/Asynchronous and High-Speed-Synchronous)
– Two On-Chip CAN Interfaces (Rev. 2.0B active) with 2 × 15 Message Objects
– On-Chip Real Time Clock
– Programmable External Bus Characteristics for Different Address Ranges
– Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit
– Five Programmable Chip-Select Signals
– Hold- and Hold-Acknowledge Bus Arbitration Support
partly with Selectable Input Thresholds and Hysteresis
down to 7.8 µ s
(Full CAN/Basic CAN), can work on one bus with 30 objects
Data Bus Width
1
V2.2, 2001-08
C167CS