LMX2352TM National Semiconductor, LMX2352TM Datasheet - Page 16

• Manufacturer Part Number: LMX2352TM
• Description: 07B5847
• Manufacturer: National Semiconductor

Specifications of LMX2352TM

• Pll Type: Frequency Synthesis
• Frequency: 1.2GHz
• Supply Current: 4.75mA
• Supply Voltage Range: 2.7V To 5.5V
• Digital Ic Case Style: TSSOP
• No. Of Pins: 24
• Rohs Compliant: No

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Programming Description
Synchronous Power down Mode
One of the PLL loops can be synchronously powered down
by first setting the power down mode bit HIGH (IF_N[21] = 1)
and then asserting its power down bit (IF_N[22] or RF_N[22]
= 1). The power down function is gated by the charge pump.
Once the power down bit is loaded, the part will go into
power down mode upon the completion of a charge pump
pulse event.
Asynchronous Power down Mode
One of the PLL loops can be asynchronously powered down
by first setting the power down mode bit LOW (IF_N[21] = 0)
and then asserting its power down bit (IF_N[22] or RF_N[22]
= 1). The power down function is NOT gated by the charge
pump. Once the power down bit is loaded, the part will go
into power down mode immediately.
Prescaler select is used to set the RF prescaler. The
LMX2350 is capable of operating from 500 MHz to 1.2 GHz
with the 16/17 prescaler, and 1.2 GHz to 2.5 GHz with the
32/33 prescaler selection. The LMX2352 is capable of oper-
ating from 250 MHz to 500 MHz with the 8/9 prescaler, and
500MHz to 1.2GHz with 16/17 prescaler selection.
4.2.4 FRACTIONAL MODULUS ACCUMULATOR (FRAC_CNTR)
4.3 PULSE SWALLOW FUNCTION
F:
fvco: Output frequency of external voltage controlled oscil-
B:
A:
4.4 CMOS (Programmable CMOS outputs)
Note: Test bit is reserved and should be set to zero for normal usage.
Modulus 15
Fractional ratio (contents of FRAC_CNTR divided by
the fractional modulus)
lator (VCO)
Preset divide ratio of binary 10-bit programmable
counter
Preset value of binary 4 or 5-bit swallow counter (0
A 31 {RF} , 0 A 15 {IF} , A+2
14/15
1/15
2/15
N/A
0
-
MSB
FastLock
Fractional Ratio (F)
Modulus 16
14/16
15/16
1/16
2/16
0
-
B {RF}, A B {IF})
(Continued)
TEST
fvco = [N + F] x [fosc / R ]
RF_N[5]
(IF_N[17]-[20])
N = (P x B) + A
0
0
0
1
1
-
16
4.2.2 5-BIT RF SWALLOW COUNTER DIVIDE RATIO
(RF A COUNTER)
Note: Swallow Counter Value LMX2350: 0 to 31; LMX2352: 0 to 15
4.2.3 10-BIT RF PROGRAMMABLE COUNTER DIVIDE
RATIO (RF B COUNTER)
Note: Divide ratio: 3 to 1023 (Divide ratios less than 3 are prohibited)
fosc: Output frequency of the external reference frequency
R:
P:
Divide Ratio
Swallow Count
1,023
RF_NB_CNTR
RF_NB_CNTR
RF_N[4]
3
4
oscillator
Preset divide ratio of binary 15-bit programmable ref-
erence counter (3 to 16383)
Preset
(LMX2350:RF P=16 or 32, IF P=8)
(LMX2352:RF P=8 or 16, IF P=8)
-
(A)
OUT_1
31
(RF_N[2]-[5])
0
0
0
1
1
-
0
1
-
FRAC_CNTR
modulus
9
0
0
1
-
RF_NA_CNTR + 2
RF_NA_CNTR + 2
8
0
0
1
-
RF_NB_CNTR
4
0
0
-
1
7
0
0
1
RF_N[3]
-
of
(RF_N[6]-[10])
0
0
1
1
1
-
6
0
0
1
-
3
0
0
-
1
dual
RF_NA_CNTR
5
0
0
1
-
(RF_N[11]-[20])
4
0
0
1
modulus
2
0
0
-
1
-
OUT_0
LSB
3
0
0
1
-
RF_N[2]
1
0
0
-
1
2
0
1
1
-
0
1
0
0
1
-
prescaler
1
1
0
1
-
0
0
1
-
1
0
1
0
1
-