XRP7740ILB-0X18-F Exar Corporation, XRP7740ILB-0X18-F Datasheet - Page 22

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XRP7740ILB-0X18-F

Manufacturer Part Number
XRP7740ILB-0X18-F
Description
IC CTRLR PWM/LDO STP-DWN 40TQFN
Manufacturer
Exar Corporation
Series
-r
Datasheet

Specifications of XRP7740ILB-0X18-F

Topology
Step-Down (Buck) Synchronous (4), Linear (LDO) (1)
Function
Any Function
Number Of Outputs
5
Frequency - Switching
1.5MHz
Voltage/current - Output 1
Controller
Voltage/current - Output 2
Controller
Voltage/current - Output 3
Controller
W/led Driver
No
W/supervisor
No
W/sequencer
Yes
Voltage - Supply
6.5 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
1016-1697
When an external clock is used, the user will need to setup the master to also have an external
clock in function. All of the same rules apply as in the External clock synchronization, Synchronized
operation as a Slave unit section of this document.
either the external clock going to both Master/Slave CLK_IN, or CLK_IN can go to the Master, and
the Master can synchronize SYNC_OUT and CLK_OUT to the Slave.
P
Each switching channel can be programmed to a phase shift of the multiples of 90 degrees [for a 4
phase configuration] or 120 degrees [for a 3 phase configuration]. Two or more of the channels
can use the same phase shift, however, it is preferable to run each channel at separate phases.
GPIO P
The General Purpose Input Output (GPIO) Pins are the basic interface between the XRP7708 and
the system. Although all of the stored data within the IC can be read back using the I
sometimes convenient to have some of those internal register to be displayed and or controlled by
a single data pin. Besides simple input output functions the GPIO pins can be configured to serve
as external clock inputs. These pins can be programmed using OTP bits or can be programmed
using the I
functions that the GPIO can be programmed to do.
NOTE: the GPIO Pins (and all I/Os) should NOT be driven without a 10K resistor when VIN is not
being applied to the IC.
© 2011 Exar Corporation
External Clock Synchronization Master Slave combination
HASE
S
INS
HIFT
2
C bus. This GPIO_CONFIG register allows the user close to 100 different configuration
CLK_IN
CLK_IN
Fig. 258:Alternative External clock synchronization Master Slave combination
Fig. 24: External Clock Synchronization Master Slave Combination
external clock sync
external clock sync
GPIO1
GPIO3
Configured as a
Configured as a
Q
Q
master with
master with
XRP7708
XRP7708
u
u
a
a
d
d
GPIO1
GPIO2
GPIO2
C
C
h
h
a
a
CLK_OUT
SYNC_OUT
SYNC_OUT
n
n
22/28
n
n
e
e
l
l
D
D
i
i
g
g
There are two ways of synchronizing this,
i
i
t
t
a
a
SYNC_IN
SYNC_IN
CLK_IN
CLK_IN
l
l
P
P
X
X
W
W
R
R
M
M
GPIO2
GPIO2
GPIO1
GPIO1
P
P
S
S
7
7
configured
configured
XRP7708
XRP7708
as slave
as slave
t
t
7
7
e
e
0
0
p
p
8
8
D
D
o
o
a
a
w
w
n
n
n
d
n
d
C
C
X
X
o
o
R
R
n
n
2
C bus it is
P
P
t
t
Rev. 1.2.0
r
r
7
7
o
o
7
7
l
l
l
l
e
e
4
4
r
r
0
0
s
s

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