AFBR-79E4Z-D Avago Technologies US Inc., AFBR-79E4Z-D Datasheet
AFBR-79E4Z-D
Specifications of AFBR-79E4Z-D
Related parts for AFBR-79E4Z-D
AFBR-79E4Z-D Summary of contents
Page 1
... AFBR-79E4Z, AFBR-79E4Z-D 40 Gigabit Ethernet (40GBASE-SR4) QSFP+ Pluggable, Parallel Fiber-Optics Module Data Sheet Description The Avago Technologies AFBR-79E4Z(- Four-Chan- nel, Pluggable, Parallel, Fiber-Optic QSFP+ Transceiver for 40 Gigabit Ethernet Applications. This transceiver is a high performance module for short-range multi-lane data com- munication and interconnect applications. It integrates four data lanes in each direction with 40 Gbps aggregate bandwidth ...
Page 2
TX Input Buffer Din[4:1][p/n] (8) 4 Channels SCL SDA ModSelL Control LPMode ModPresL ResetL IntL RX Output Buffer Dout[4:1][p/n] (8) 4 Channels Figure 1. Transceiver Block Diagram Transmitter The optical transmitter portion of the transceiver (see Figure 1) incorporates a ...
Page 3
... Memory Map section and corresponding Avago Technol- ogies QSFP+ Memory Map document. Digital Diagnostic Monitoring Digital diagnostic monitoring is available for AFBR-79E4Z-D. The information provides opportunity for predictive failure identifi cation, compliance prediction, fault isolation and component monitoring. ...
Page 4
Regulatory & Compliance Various standard and regulations apply to the modules. These include eye-safety, EMC, ESD and RoHS. See the Regulatory Section for details regarding these and com- ponent recognition. Please note the module transmitter is a Class 1M laser ...
Page 5
Recommended Operating Conditions Recommended Operating Conditions specify parameters for which the optical and electrical characteristics hold unless otherwise noted. Optical and electrical characteristics are not defi ned for operation outside the Recommended Operating Conditions, reliability is not implied and damage ...
Page 6
Transmitter Electrical Characteristics The following characteristics are defi ned over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C, Vcc = 3.3 V Parameter LOS Assert Threshold: Tx Data Input Diff erential Peak-to-Peak Voltage Swing ...
Page 7
Receiver Electrical Characteristics The following characteristics are defi ned over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C, Vcc = 3.3 V Parameter (From Table 86A-3 of IEEE 802.3ba) Single ended output voltage AC ...
Page 8
Transmitter Optical Characteristics The following characteristics are defi ned over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C, Vcc = 3.3 V Parameter (From Table 86-6 of IEEE 802.3ba) Test Point* Center wavelength TP2 ...
Page 9
Receiver Optical Characteristics The following characteristics are defi ned over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C, Vcc = 3.3 V Parameter (From Table 86-8 of IEEE 802.3ba) Center wavelength, each lane 1 ...
Page 10
Regulatory Compliance Table Feature Test Method Electrostatic Discharge JEDEC Human Body Model (HBM) (ESD) to the Electrical (JESD22-A114-B) Contacts JEDEC Charge Device Model (CDM) (JESD22-C101D) Electrostatic Discharge (ESD) GR1089 to Optical connector Electrostatic Discharge Variation of IEC 61000-4-2 (ESD) to ...
Page 11
QSFP+ Transceiver Pad Layout 38 GND 37 TX1n 36 TX1p 35 GND 34 TX3n 33 TX3p 32 GND 31 LPMode 30 Vcc1 29 VccTx 28 IntL 27 ModPrsL 26 GND 25 RX4p 24 RX4n 23 GND 22 RX2p 21 RX2n ...
Page 12
Figure 8. Case Temperature Measurement Point Vcc Tx 0.1 μF GND Vcc Rx 0.1 μF GND Vcc1 0.1 μF GND QSFP+ Module Figure 9. Recommended Power Supply Filter VCC25 VCC33 50 Ω DPx VCC25 VCC33 50 Ω DNx Figure 10. ...
Page 13
VCC25 VCC25 50 Ω 50 Ω Signal Path (Neg) Signal Path (Pos) Figure 11. Receiver Data Output Equivalent Circuit t START HIGH t LOW SCL t t HD,SDA HD,DAT t t SU,SDA R SDA In Figure 12. TWS Interface Bus ...
Page 14
Package Outline, Host PCB Footprint and Bezel Design (12.67) 8.20 All dimensions in mm Figure 13. Mechanical Package Outline X BASIC Y Ø1.05 ±0.05 BASIC 17.90 REF. 22.15 19.00 Cross-hatched area denotes component and trace keep-out (except chassis ground) This ...
Page 15
Datum Axis C 15.02 MAX. 19.20 MAX. 2 22.15 Ø1.55 ±0.05 Ø0. Notes: 1. Centerline of Pad 2. Surface traces permitted within this length 3. Indicated holes are optional Figure ...
Page 16
... Soft Status and Control A number of soft status signals and controls are available in the AFBR-79E4Z(-D) transceiver memory and acces- sible through the TWS interface. Some soft status signals include receiver LOS, optional transmitter LOS, transmitter fault and diagnostic monitor alarms and warnings. Some ...
Page 17
... The receiver disable control is on page 3 address 241 bits 4-7 for channels 1-4 respectively. Transmitter Squelch Disable The transmitter squelch disable control is on page 3 address 240 bits 0-3 for channels 1-4 respectively. AFBR- 79E4Z(-D) transceivers have transmitter output squelch function enabled as default. Receiver Squelch Disable The receiver squelch disable control is on page 3 address 240 bits 4-7 for channels 1-4 respectively ...
Page 18
I/O Timing for Control and Status Functions The following characteristics are defi ned over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C, Vcc = 3.3 V Parameter Symbol Initialization Time t_init LPMode Assert Time ...
Page 19
Memory Map The memory is structured as a single address, multiple page approach. The address is given as A0xh. The structure of the memory is shown in Figure 17. The memory space is arranged into a lower, single page, address ...