M27C1001-70B1 ST Microelectronics, M27C1001-70B1 Datasheet - Page 9

• Manufacturer Part Number: M27C1001-70B1
• Manufacturer: ST Microelectronics

Specifications of M27C1001-70B1

• Density: 1Mb
• Organization: 128Kx8
• Bus Type: Parallel
• In System Programmable: External
• Reprogramming Technique: OTP
• Access Time (max): 70ns
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Supply Current: 50mA
• Package Type: PDIP
• Pin Count: 32
• Mounting: Through Hole
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

M27C1001
2.4
2.5
2.6
ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is required from a particular memory device.
System considerations
The power switching characteristics of Advanced CMOS EPROMs require careful
decoupling of the devices. The supply current, I
the system designer: the standby current level, the active current level, and transient current
peaks that are produced by the falling and rising edges of E. The magnitude of the transient
current peaks is dependent on the capacitive and inductive loading of the device at the
output. The associated transient voltage peaks can be suppressed by complying with the
two line output control and by properly selected decoupling capacitors. It is recommended
that a 0.1µF ceramic capacitor be used on every device between V
be a high frequency capacitor of low inherent inductance and should be placed as close to
the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used
between V
power supply connection point. The purpose of the bulk capacitor is to overcome the voltage
drop caused by the inductive effects of PCB traces.
Programming
When delivered (and after each erasure for UV EPROM), all bits of the M27C1001 are in the
'1' state. Data is introduced by selectively programming '0's into the desired bit locations.
Although only '0's will be programmed, both '1's and '0's can be present in the data word.
The only way to change a '0' to a '1' is by die exposition to ultraviolet light (UV EPROM). The
M27C1001 is in the programming mode when V
pulsed to V
pins. The levels required for the address and data inputs are TTL. V
6.25V ± 0.25V.
Presto II programming algorithm
Presto II Programming Algorithm allows the whole array to be programmed, with a
guaranteed margin, in a typical time of 13 seconds. Programming with Presto II involves in
applying a sequence of 100µs program pulses to each byte until a correct verify occurs (see
Figure
activated in order to guarantee that each cell is programmed with enough margin. No
overprogram pulse is applied since the verify in Margin mode provides necessary margin to
each programmed cell.
5). During programming and verify operation, a Margin mode circuit is automatically
CC
IL
. The data to be programmed is applied to 8 bits in parallel to the data output
and V
SS
for every eight devices. The bulk capacitor should be located near the
CC
PP
, has three segments that are of interest to
input is at 12.75V, E is at V
CC
CC
and V
is specified to be
Device description
SS
IL
. This should
and P is
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