LFXP6E-4Q208C Lattice, LFXP6E-4Q208C Datasheet - Page 304
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LFXP6E-4Q208C
Manufacturer Part Number
LFXP6E-4Q208C
Description
IC FPGA 5.8KLUTS 142I/O 208-PQFP
Manufacturer
Lattice
Datasheet
1.LFXP3C-3T100C.pdf
(397 pages)
Specifications of LFXP6E-4Q208C
Lead Free Status / Rohs Status
Contains lead / RoHS non-compliant
Available stocks
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Part Number:
LFXP6E-4Q208C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Table 13-4. Maximum Configuration Bits
Table 13-5. SDM Pin Usage
Table 13-6. Pins Used for Memory Access
Programming Sequence
There are three types of programming, SRAM, Flash Direct, and Flash Background. This section goes through the
process for each showing how the dedicated pins are used.
SRAM: When not using SDM (Self Download Mode, on-chip Flash) to program SRAM the sequence begins when
the internal power-on reset (POR) is released or the PROGRAMN pin is driven low (see Figure 13-2). The Lattic-
eXP then drives INITN low, tri-states the I/Os, and initializes the internal SRAM and control logic. When this is com-
Flash Programming Mode
PROGRAMN
BUSY
INITN
DONE
PERSISTENT Bit
1. ispJTAG can be used to program the Flash regardless of the state of the CFG pins, however only if the device is in SDM can Flash be used
2. The state of the PROGRAMN pin is ignored by the device during JTAG Flash programming but the pin should be held high as a low will
3. The state of the INITN pin is ignored by the device during JTAG Flash programming but the pin should be allowed to float high using the
4. The state of the DONE pin is ignored by the device during JTAG Flash programming but the pin should be allowed to float high using the
to configure SRAM
inhibit Flash to SRAM data transfer.
internal pull-up.
internal pull-up as a low can keep the device from waking up.
Configuration Mode
User I/O States
CFG[1:0]
Pins
Port
1. The ispJTAG port is always available independent of the CFG setting.
2. Readback can only be disabled by programming the security bit.
3. Set the PERSISTENT bit to ON to retain the sysCONFIG port for background readback.
4. Flash access is not allowed in this mode.
5. SRAM readback is not allowed in this mode.
X
CFG Pins
1
1
1
0
0
1
X
0
1
0
1
0
1
CCLK, CSN, CS1N, WRITEN, D[0:7]
Don’t Care
Pass/Fail
Tristate
Direct
Status
Done
Slave Parallel
Master Serial
Slave Serial
CFG Mode
JTAG
SDM
Density
LFXP10
LFXP15
LFXP20
LFXP3
LFXP6
sysCONFIG
On-Chip Flash
Write or Read
sysCONFIG
Background
Keep at High
Not Used
13-5
Pass/Fail
N/A
N/A
N/A
TAP
Status
User
SDM (Self Download Mode)
ON
4
4
4
Bitstream Size (Mb)
2
On-Chip Flash
[1, 1]
1.6
2.8
4.9
sysCONFIG
sysCONFIG
sysCONFIG
Write From
LatticeXP sysCONFIG Usage Guide
1
4
TAP
BSCAN
Direct
SRAM
Readback
sysCONFIG
sysCONFIG
Keep At High
Keep at High
Don’t Care
Not Used
ispJTAG
N/A
N/A
Not Used
TAP
TAP
5
5
2, 3
1
3
Background
4
2
User
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