LFE3-35EA-8FN672I Lattice, LFE3-35EA-8FN672I Datasheet - Page 21

• Manufacturer Part Number: LFE3-35EA-8FN672I
• Description: IC FPGA 33.3K LUTS 310I/O FN672
• Manufacturer: Lattice
• Series: ECP3r

Specifications of LFE3-35EA-8FN672I

• Number Of Logic Elements/cells: 33000
• Number Of Labs/clbs: 4125
• Total Ram Bits: 1358848
• Number Of I /o: 310
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 672-BBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 220-1163

Lattice Semiconductor
Figure 2-20. Sources of Edge Clock (Left and Right Edges)
Figure 2-21. Sources of Edge Clock (Top Edge)
The edge clocks have low injection delay and low skew. They are used to clock the I/O registers and thus are ideal
for creating I/O interfaces with a single clock signal and a wide data bus. They are also used for DDR Memory or
Generic DDR interfaces.
from DLL Slave Delay
from DLL Slave Delay
Top Right PLL_CLKOS
Top Right PLL_CLKOP
Top Left PLL_CLKOS
DLL Output CLKOP
PLL Output CLKOS
PLL Output CLKOP
DLL Output CLKOS
PLL Output CLKOP
PLL Output CLKOS
Top left PLL_CLKOP
Right DLL_CLKOS
Right DLL_CLKOP
Left DLL_CLKOP
Left DLL_CLKOS
(Right DLL_DEL)
PLL Input Pad
PLL Input Pad
(Left DLL_DEL)
CLKINDEL
CLKINDEL
Input Pad
Input Pad
CLKINDEL
CLKINDEL
Input Pad
Input Pad
Routing
Routing
Routing
Routing
2-18
7:1
7:1
7:1
7:1
Left and Right
Left and Right
Edge Clocks
Edge Clocks
ECLK1
ECLK2
ECLK1
ECLK2
LatticeECP3 Family Data Sheet
Architecture