OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 48
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OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
NXP Semiconductors
Table 16.
T
[1]
[2]
[3]
[4]
LPC122X
Objective data sheet
Symbol
T
SSP master
t
t
t
t
SSP slave
t
t
t
t
DS
DH
v(Q)
h(Q)
DS
DH
v(Q)
h(Q)
amb
cy(clk)
T
main clock frequency f
register), and the SSP CPSDVSR parameter (specified in the SSP clock prescale register).
T
T
T
= 25
cy(clk)
amb
cy(clk)
amb
= 40 C to 85 C; V
= 25 C; V
= (SSPCLKDIV (1 + SCR) CPSDVSR) / f
= 12 T
C.
Dynamic characteristics: SSP pins in SPI mode
11.5 SSP/SPI interface
cy(PCLK)
DD(3V3)
Parameter
clock cycle time
data set-up time
data hold time
data output valid time
data output hold time
data set-up time
data hold time
data output valid time
data output hold time
main
.
= 3.3 V; V
DD(3V3)
, the SSP peripheral clock divider (SSPCLKDIV), the SSP SCR parameter (specified in the SSP0CR0
DD(IO)
= 3.0 V to 3.6 V; V
= 3.3 V.
All information provided in this document is subject to legal disclaimers.
Rev. 1.2 — 29 March 2011
DD(IO)
main
Conditions
when only
transmitting
when only
receiving
in SPI mode
in SPI mode
in SPI mode
in SPI mode
in SPI mode
in SPI mode
in SPI mode
in SPI mode
. The clock cycle time derived from the SPI bit rate T
= 3.0 V to 3.6 V.
[1]
[2]
[2]
[2]
[2]
[3][4]
[3][4]
[3][4]
[3][4]
Min
<tbd>
<tbd>
15
0
-
0
0
3 T
-
-
32-bit ARM Cortex-M0 microcontroller
cy(PCLK)
+ 4
Max
-
-
-
-
10
-
-
-
3 T
2 T
cy(PCLK)
cy(PCLK)
cy(clk)
LPC122x
© NXP B.V. 2011. All rights reserved.
is a function of the
+ 11
+ 5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
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