OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 36
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OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
NXP Semiconductors
LPC122X
Objective data sheet
Fig 8.
Fig 9.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
(mA)
I
DD
16
12
Active mode: Typical supply current I
Conditions: V
peripherals enabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = <tbd>).
clock frequencies (peripherals enabled)
Conditions: V
SYSAHBCLKCTRL register (SYSAHBCLKCTRL = <tbd>); all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled.
Sleep mode: Typical supply current I
clock frequencies
8
4
0
−40
All information provided in this document is subject to legal disclaimers.
DD(3V3)
DD(3V3)
(X)
X
Rev. 1.2 — 29 March 2011
−15
X
X
X
X
X
X
= 3.3 V; active mode entered executing code
= 3.3 V; sleep mode entered from flash; all peripherals disabled in the
X
X
<tbd>
10
X
DD
DD
versus temperature for different system
X
versus temperature for different system
32-bit ARM Cortex-M0 microcontroller
35
X
33 MHz
24 MHz
12 MHz
001aab173
4 MHz
1 MHz
X (X)
while(1){}
X
60
temperature (°C)
LPC122x
002aag024
© NXP B.V. 2011. All rights reserved.
from flash; all
85
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