PEB22504HT-V11 Infineon Technologies, PEB22504HT-V11 Datasheet - Page 39

• Manufacturer Part Number: PEB22504HT-V11
• Description: IC INTERFACE QUAD 100-TQFP
• Manufacturer: Infineon Technologies

Specifications of PEB22504HT-V11

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 100-LFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB22504HT-V11; PEB22504HT-V11IN

4.1.7
Pulse-density violations of the received signal are detected according to ANSI T1.403.
Violations are indicated (LSR0.PDEN, ISR0.PDENI) if the incoming signal contains:
• More than 15 consecutive zeros or
• Fewer than N ones in each and every time window of 8
The indication is cleared, if the pulse-density fulfills the requirement within 23 received
ones.
4.1.8
The receive line interface includes alarm detection for AIS (Alarm Indication Signal) and
LOS (Loss Of Signal).
4.1.8.1
The AIS is detected according to ITU-T G.775 and ANSI T1.231.
In E1 applications, the alarm is set when the incoming signal has fewer than three zeros
in each of two consecutive 512-bit periods. In T1 applications, the AIS alarm is set when
fewer than 6 zeros are detected within a time interval of 3 ms received on RL1/2. AIS
detection also works in the presence of a bit error rate of up to 10
An AIS alarm is indicated in a Line Status Register (LSR0.AIS) and an Interrupt Status
Register (ISR0.AIS).
4.1.8.2
There are different definitions for detecting LOS alarms in the ITU-T G.775, ETS 300233,
ANSI T1.403 and T1.231. The QuadLIU™ covers all these standards. The LOS
indication is performed by generating an interrupt (if not masked) and activating a status
bit. Additionally, a LOS status change interrupt is programmable via register LIM4.SCI.
• Detection:
Data Sheet
taking on all values of 1 to 23.
In digital receive interface mode (LIM1.ECMIR = 1), an alarm is generated if the
incoming data stream has no pulses (no transitions) for a certain number (N) of
consecutive pulse periods. “No pulse” means a logical zero on pin ROID.
In analog receive interface mode (LIM1.ECMIR = 0), a pulse with an amplitude less
than Q dB below nominal is the criteria for “no pulse”. The receive signal level Q is
programmable via three control bits, LIM2.RIL(2:0), related to the differential voltage
between pins RL1 and RL2 (see DC Characteristics on page 100). The number N can
be set via an 8-bit register, PCD. The contents of the PCD register is multiplied by 16;
the product equals the number of pulse periods until the alarm has to be detected (16
Pulse-Density Detector
Alarm Handling
AIS (Blue Alarm) Detection
LOS (Red Alarm) Detection
39
(N+1) digit time slots with N
Interface Description
-3
.
QuadLIU V1.1
PEB 22504
2001-02