PDI1394P25BD ST-Ericsson Inc, PDI1394P25BD Datasheet - Page 11

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PDI1394P25BD

Manufacturer Part Number
PDI1394P25BD
Description
IC IEEE 1394 LINK CTRLR 64LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of PDI1394P25BD

Applications
AV,TV, VTR
Interface
IEEE 1394
Voltage - Supply
3 V ~ 3.6 V
Package / Case
64-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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low-power reset state in which the CTL and D outputs are held in the
1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
Philips Semiconductors
The LPS input is considered inactive if it remains low for more than
2.6 s and is considered active otherwise. When the PDI1394P25
detects that LPS is inactive, it will place the PHY-LLC interface into a
logic zero state and the LREQ input is ignored; however, the
SYSCLK output remains active. If the LPS input remains low for
more than 26 s, the PHY-LLC interface is put into a low-power
disabled state in which the SYSCLK output is also held inactive. The
PHY-LLC interface is also held in the disabled state during hardware
reset. The PDI1394P25 will continue the necessary repeater
functions required for normal network operation regardless of the
state of the PHY-LLC interface. When the interface is in the reset or
disabled state and LPS is again observed active, the PHY will
initialize the interface and return it to normal operation.
8.0 ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V).
NOTE:
2001 Sep 06
SYMBOL
SYMBOL
V
1-port 400 Mbps physical layer interface
only, and functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating
Conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
T
V
I
T
–5 V
V
amb
V
DD
stg
O
I
DC supply voltage
DC input voltage
5 volt tolerant input voltage range
DC output voltage range at any output
Electrostatic discharge
Electrostatic discharge
Operating free-air temperature range
Storage temperature range
PARAMETER
PARAMETER
1
10
Human Body Model
Machine Model
CONDITION
CONDITION
The PHY uses the C/LKON terminal to notify the LLC to power up
and become active. When activated, the C/LKON signal is a square
wave of approximately 163 ns period. The PHY activates the
C/LKON output when the LLC is inactive and a wake-up event
occurs. The LLC is considered inactive when either the LPS input is
inactive, as described above, or the LCtrI bit is cleared to 0. A
wake-up event occurs when a link-on PHY packet addressed to this
node is received, or conditionally when a PHY interrupt occurs. The
PHY deasserts the C/LKON output when the LLC becomes active
(both LPS active and the LCtrl bit set to 1). The PHY also deasserts
the C/LKON output when a bus-reset occurs unless a PHY interrupt
condition exists which would otherwise cause C/LKON to be active.
–0.5
–0.5
–0.5
–0.5
MIN
–65
0
LIMITS
PDI1394P25
V
V
DD
DD
MAX
+150
200
+70
4.0
5.5
2
+0.5
+0.5
Preliminary data
UNIT
UNIT
kV
V
V
V
V
V
C
C

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