DS33X161+ Maxim Integrated Products, DS33X161+ Datasheet - Page 261

IC MAPPING ETHERNET 256CSBGA

DS33X161+

Manufacturer Part Number
DS33X161+
Description
IC MAPPING ETHERNET 256CSBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33X161+

Applications
Data Transport
Interface
Parallel/Serial
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
256-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
551h:
Default
Register Name:
Register Description:
Register Address:
550h:
Default
Bits 12-15: Port n Receive Sequence (RVSQ[3:0]) These bits are updated every VCAT Frame on SOF
boundaries. These bits report the previous frame’s Sequence value. (LCAS only)
Bits 8-11: Port n Control Word (CTRL[3:0]) These bits are updated every VCAT Frame on SOF boundaries.
These bits report the previous frame’s Control Word. (LCAS only)
CTRL[3:0]
0000
0001
0010
0011
0101
1111
Bit 4: RS-ACK Status (RSACK)
Bit 0: Loss of Multiframe Sync (LOM) – This bit corresponds to the Receive VCAT Framer status of the WAN
port.
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
0 = RS-ACK for port n for the previous VCAT frame is 0.
1 = RS-ACK for port n for the previous VCAT frame is 1.
0 = No LOM for port n
1 = LOM active for port n
RVSQ3
Bit 15
Bit 7
Control Word
FIXED
ADD
NORM
EOS
IDLE
DNU
0
0
-
RVSQ2
Bit 14
Bit 6
0
0
-
VCAT.RSR1
VCAT Receive Status Register 1
550h (+ 002h x (n-1), Physical WAN Port n=1 to 16)
RVSQ1
Bit 13
Bit 5
0
0
-
RVSQ0
RSACK
Bit 12
Bit 4
0
0
CTRL3
Bit 11
Bit 3
0
0
-
CTRL2
Bit 10
Bit 2
0
0
-
CTRL1
Bit 9
Bit 1
0
0
-
261 of 375
CTRL0
Bit 8
Bit 0
LOM
0
0

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